7C342B
Abstract: 68-PIN CY7C342B k941
Contextual Info: 7C342B:11/91 Revision: July 19, 2000 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.
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74151
Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Contextual Info: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of
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cy7c340cy7c34x65-microncy7c34xb+107415174151 pin connectionc340674151 pin diagram74151 waveformcounter schematic diagram 74161programmer epld22v105192jm74151 multiplexer
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31-oq
Abstract: 7C342-25 CY7C342-35HMB 7C342-35 CY7C342 CY7C342B OQ11
Contextual Info: CY7C342 7C342B rif CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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C3402
Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
Contextual Info: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase
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cy7c340cy7c34x65-microncy7c34xb+9c3402741515128lc-174151 pin diagram5128lc-274151 8 to 174151 pin connectionfunction of 7415122v10-10c
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ATPA
Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C
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cy2147-35ccy7c147-35ccy7c147-45ccy91l22-35c+14cy7c122-35ccy2147-45ccy7c148-35ccy7c148-25catpa7130sa100p24l017c263/4-35c7164s15ycy9122-257133sa35j7142sa557130sa55pcy2149-45c
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C3424
Abstract: 68-PIN 7C342-30 7C342-35 CY7C342 CY7C342B C3422 CY7C342-30HC CY7C342B-30RMB 30RM
Contextual Info: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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cy7c342cy7c342b128-macrocell65-micron+1068-pincy7c342/cy7c342bcy7c342/c34247c342-307c342-35c3422cy7c342-30hccy7c342b-30rmb30rm
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81c78
Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
Contextual Info: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M
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68-PIN
Abstract: CY7C342B ULTRA37000TM CY7C342B-30JC
Contextual Info: USE ULTRA37000TM FOR ALL NEW DESIGNS 7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the 7C342B are divided into eight
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7C342C
Contextual Info: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features F unctional D escrip tion • The CY7C342/7C342B is an Erasable P rogram m able Logic Device E P L D in which CM O S E P R O M cells are used to configure logic functions w ithin the device. T he M AX architecture is 100% user confi
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cy7c34265-microncy7c342b68-pin+4128-macrocell7c342/cy7c342b7400-series7c342c
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MSM 6290
Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+
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68-PIN
Abstract: CY7C342B
Contextual Info: 42B 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • •
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74151 PIN DIAGRAM
Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
Contextual Info: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase
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Contextual Info: CY7C342 7C342B CYPRESS SEMICONDUCTOR & 128-Macrocell M A X EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC, PGA, and Flatpack
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tag l9 225 400
Abstract: TAG B6 CY7C342B H-81
Contextual Info: 7c342: 11-4-91 Revision: October 19, 1995 7C342B 128ĆMacrocell MAXR EPLDs Features D 128 macrocells in 8 LABs D 8 dedicated inputs, 52 bidirectional The 7C342B is an Erasable ProgramĆ mable Logic Device EPLD in which CMOS EPROM cells are used to configure
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Contextual Info: 7C342B S / CYPRESS Features • 128-Macrocell MAX EPLDs m a b lc L ogic D evice E P L D in w h ich C M O S E P R O M c e lls a re u se d to c o n fig u re logic fu n c tio n s w ith in th e d ev ice. T h e M A X a rc h ite c tu re is 100% u s e r c o n fig u r
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CY7C342B
Abstract: 68-PIN CY7C342B-35RMB
Contextual Info: fax id: 6107 1CY 7C34 2B 7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.
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cy7c342b128-macrocell65-micron68-pin+1cy7c342b-35rmb
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k941
Abstract: 68-PIN CY7C342B ULTRA37000TM
Contextual Info: USE ULTRA37000TM FOR ALL NEW DESIGNS 7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the 7C342B are divided into eight
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27HC642
Abstract: 39C10B PAL22V10APC CY2254SC-1 7132SA70 93L422AM 7024S15 7130SA25 7C198-45C 7006S
Contextual Info: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+
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CY7C342B
Abstract: 7C342B-35 68-PIN CY7C342B15HMB CY7C342B-35RMB CY7C342B-35HC
Contextual Info: 1CY 7C34 2B 7C342B 128-Macrocell MAX EPLDs Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.
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CY7C342B
Abstract: EME-6300H
Contextual Info: Qualification Report August 1996, QTP# 95514, Version 1.1 7C342B 128-Macrocell MAX EPLD MAX is a register trademark of Altera Coporation. PRODUCT DESCRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied:
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HR210
Contextual Info: CY7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs T he CY 7C342/7C342B is an E rasable Program m able Logic Device E P L D in which C M O S E P R O M cells are used to configure logic functions w ithin the device.
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CY7C342B-25jc
Abstract: 68-PIN CY7C342B K941
Contextual Info: 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • • •
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G013G
Abstract: 05V3 7C342-30 7C342-35 CY7C342 CY7C342B CY7C342-30RMB K941 12J8 CY7C342-35JC
Contextual Info: CY7C342 7C342B ^ CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342
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CY7C342-35RMB
Abstract: CY7C342-30HC CY7C342 CY7C342B 4s44 CY7C342-30RMB 7C342-30
Contextual Info: fc.SE D CYPRESS SEMICONDUCTOR • SSôTbhE 0D1D4Û0 41Ô * C Y P CY7C342 7C342B :s CYPRESS SEMICONDUCTOR 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array
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