75265 Search Results

TLC32046

Contextual Info: TLC32046 WIDE-BAND ANALOG INTERFACE CIRCUITS Telecommunications Circuits See the TLC32046 Wide-Band Analog Interface Circuits Data Manual in Section 3 for product information. , Tex a s ^ In s t r u m e n t s POST OFFICE BOX 655303 * DALLAS, TEXAS 75265

TBP18S030

Abstract: TBP18SA030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

TBP18SA030

Abstract: JBP18S030MJ JBP18S030MW TBP18S030 JBP18S030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

soil moisture sensors

Abstract: Victory Engineering Thermistor asymtek victory engineering spreeta biosensor miniature mass air flow sensor spreeta LED InfraTec spreeta 2000
Contextual Info: Detection of trinitrotoluene TNT extracted from soil using a surface plasmon resonance (SPR)-based sensor platform Anita A. Stronga, Donald I. Stimpsona, Dwight U. Bartholomewa, Thomas F. Jenkinsb, Jerry L. Elkinda a Texas Instruments, Incorporated, P.O. Box 655012 MS 945, Dallas, TX 75265

256BITs

Abstract: JBP18S030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

Contextual Info: GD65232, GD75232 MULTIPLE RS-232 DRIVERS AND RECEIVERS SLLS206 • Single Chip With Easy Interface Between UART and Serial-Port Connector of IBM PC/AT and Compatibles testing of all parameters. POST OFFICE BOX 655303 − DALLAS, TEXAS 75265 1

omo2

Abstract: TBP18SA030 TW-01 OMO 2
Contextual Info: 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS PIN ASSIGNMENTS TOP VIEWS T e x a s In s t r u m e n t s INCORPORATED POST O F F IC E BO X 225012 • D A L L A S , T E X A S 75265

TBP18SA030

Abstract: JBP18S030MJ TBP18S030 JBP18S030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

JBP18S030

Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

tbp18s030

Abstract: JBP18S030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

Texas Instruments TTL

Abstract: families of compatible ttl circuits texas 54/74 texas ttl data book families of compatible ttl circuits texas families of compatible circuits texas Texas Instruments TTL data book Scans-001 texas ttl
Contextual Info: 54/74 FAMILIES OF COMPATIBLE TTL CIRCUITS 1 81 T e x a s In strum ents IN C O R PO RA T ED POST OFFICE BOX 225012 • DALLAS. TEXAS 75265 This Material Copyrighted By Its Respective Manufacturer

JBP18S030

Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

JBP18S030

Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

TBP18S030

Abstract: TBP18SA030 JBP18S030
Contextual Info: TBP18S030, TBP18SA030 256 BITS 32 WORDS BY 8 BITS PROGRAMMABLE READ-ONLY MEMORIES SDMS024 – SEPTEMBER 1979 – REVISED AUGUST 1984 + Copyright  1983, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TBP18S030, TBP18SA030

54HC573

Contextual Info: SN54HC573, SN74HC573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D26B4. DECEMBER 1982-REVISED SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout Package Options Include Plastic "Small

Contextual Info: TLE2037, TLE2037A EXCALIBUR LOW -NOISE HIGH-SPEED PRECISION DECOM PENSATED OPERATIONAL AM PLIFIERS D3454, MAY 1990 - REVISED APRIL 1991 available features Outstanding Combination of DC Precision and AC Performance: Gain-Bandwldth Product. . . 80 MHz Typ V

Contextual Info: TYPES SN54H103, SN74H103 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR R E V I S E D D E C E M B E R 1983 SN 5 4 H 1 0 3 . . . J OR W P A C K A G E S N 7 4 H 103 . . . J OR N P A C K A G E P a c k a g e O p tio n s Include Plastic and C eram ic D IP s

A1619A

Abstract: b1241
Contextual Info: SN54ABT32318, SN74ABT32318 18-BIT TRI-PORT UNIVERSAL BUS EXCHANGERS SCBS180A-JUNE 1 9 9 2 - REVISED JULY 1994 Members of the Texas Instruments Wldebus+ Family State-of-the-Art EPIC-IlB™ BICMOS Design Significantly Reduces Power Dissipation Typical V q l p Output Ground Bounce

Contextual Info: TIBPAL22V10-20M HIGH-PERFORMANCE IMPACT-X PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPSQ12A - D3523, JUNE 1 9 9 0 -R E V IS E D MARCH 1992 JT P A C K A G E Second-Generation PLD Architecture TO P V IE W High-Performance Operation: fmax (External Feedback). . . 33.3 MHz

Contextual Info: SN75LBC241 LOW-POWER LinBiCMOS MULTIPLE DRIVERS AND RECEIVERS SLLS137E - MAY 1992 - REVISED JANUARY 1999 • Operates With Single 5-V Power Supply • Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 • Improved Performance Replacement for

SN74HC74

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

75ALS126

Abstract: mw137 n75a LS126 SN75129
Contextual Info: SN55ALS126, $N75ALS126 QUADRUPLE LINE DRIVERS D2299, FEBRUARY 1 9 8 6 -REVISED OCTOBER 1989 S N 55A LS126. S N 75A LS126 . . . J PACKAGE S N 75A LS126 . . . D OR N PACKAGE Meets IBM 3 6 0 /3 7 0 I/O Interface Specification G A22-6974-3 Also See SN55ALS130 and SN75ALS130

tlc3741

Abstract: resistor network 104g 9 pin
Contextual Info: TLC374, TLC374Q, TLC374Y LinCMOS QUADRUPLE DIFFERENTIAL COMPARATORS SLCS118A-NOVEMBER 1983-R EVISED OCTOBER 1996 • Single- or Dual-Supply Operation D, J, N, OR PW PACKAGE TOP VIEW • Wide Range of Supply Voltages 2 V to 18 V u 10UT[ • Very Low Supply Current Drain 0.3 mA Typ

Contextual Info: SN74BCT29854 8-BIT TO 9-BIT PARITY BUS TRANSCEIVER S C B S 257- SEPTEMBER 1987 - REVISED NOVEMBER 1993 DW OR NT PACKAGE • BICMOS Process With TTL Inputs and Outputs T O P V IE W • State-of-the-Art BICMOS Design Significantly Reduces Standby Current