74LS09 FUNCTION TABLE Search Results

Contextual Info: Signelics I 74LS09 I Gates I I Logic Products Quad Two-Input AND Gate Open Collector Product Specification I TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE VCC = 5V±5%; T a = 0°C to +70°C

74LS09 N

Contextual Info: Signelics | 74LS09 Gates Quad Two-Input AND Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V ±5% ; T a = 0°C to +70°C

74ls gate symbols

Abstract: 74LS09 equal 74LS09 function table 74LS09 74LS logic gates 74LS09 N 74LS09 ttl 1N3064 1N916 74LS
Contextual Info: SigneHcs I 74LS09 I Gates Logic Products I Quad Two-Input AND Gate Open Collector f l Product Specification • TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23 ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE VCC = 5 V ± 5% ; TA = 0°C to +70°C

74LS09

Abstract: 74ls gate symbols 74LS09 ttl 1N3064 1N916 74LS N74LS09N 74LS gates 74ls signetics 74LS logic gates
Contextual Info: Signelics I 74LS09 I G ates • Quad Two-Input AND Gate Open Collector ■ Logic Products Product Specification H TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V ±5%; T a = 0°C to +70°C

74Ls signetics

Abstract: 74LS logic gates IC 74LS 74LS09 ttl ic ttl 74ls 74ls ic 74LS09 function table
Contextual Info: 74LS09 Signetics Gates Quad Two-Input AND Gate Open Collector Product Specification Logic Products TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 23ns 4.3 74LS09 ORDERING CODE PACKAGES COMMERCIAL RANGE Vcc = 5V + 5%; T A = 0”C to +70°C

Contextual Info: GD54/74LS09 QUADRUPLE 2-INPUT POSITIVE AND GATES WITH OPEN-COLLECTOR OUTPUTS Description Pin Configuration This d evice contains four ind epen den t 2-input AND gates. It performs the Boolean functions Y = A • B or Y = A + B in positive logic. T h e open-collector out­

74HC09

Abstract: 20P1N
Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M 74H C 09P /F P /D P Q UADRUPLE 2 -IN P U T P O S IT IV E AND GATE W IT H OPEN-DRAIN O U TPU TS DESCRIPTION The M 74H C 09 is a sem iconductor integrated circuit con­ PIN CONFIGURATION TOP VIEW sisting of four 2-input po sitive-lo gic AND gates usable as

hc150

Abstract: TC74HC09
Contextual Info: TC74HC09AP/AF-QUAD 2 - I N P U T AND GATE OPEN DR A IN The TC74HC09A is a high speed CMOS 2-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation sim ilar to equivalent LSTTL while maintaining the CMOS low power

74hc09

Contextual Info: FI M54HC09 M74HC09 SCS-THOMSON IILC QUAD 2-INPUT AND GATE OPEN DRAIN . HIGH SPEED tp D = 6 ns (TYP.) AT Vcc = 5 V • LOW POWER DISSIPATION Ice = 1 uA (MAX.) AT T a = 25 :c « HIGH NOISE IMMUNITY V nih = Vnil = 28 % Vcc (MIN.) * OUTPUT DRIVE CAPABILITY 1 0 LSTTLLOADS

Contextual Info: II TC74HC09AP/AF Q U A D 2 - I N P U T A N D G A T E OPEN D R A I N The TC74HC09A is a high speed CMOS 2 -IN P U T AND GATE fab ricated w ith silicon gate C2MOS technology. It achieves the high speed operation s im ila r to equivalent LSTTL while m a in ta in in g the CMOS low pow er

74hc09

Abstract: M54HC09 M54HC09F1R M74HC09 M74HC09B1R M74HC09C1R M74HC09M1R
Contextual Info: M54HC09 M74HC09 QUAD 2-INPUT AND GATE OPEN DRAIN . . . . . . . . HIGH SPEED tPD = 6 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74HC09

Abstract: M74HC09B1R M54HC09 M54HC09F1R M74HC09 M74HC09C1R M74HC09M1R
Contextual Info: M54HC09 M74HC09 QUAD 2-INPUT AND GATE OPEN DRAIN . . . . . . . . HIGH SPEED tPD = 6 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE

74HC09

Abstract: K2108
Contextual Info: r z T S G S -T H O M S O N M 5 4 H £ 2 2 [M r a [E L H @ [* S M 74HC 09 QUAD 2-INPUT AND GATE OPEN DRAIN HIGHSPEED 6 ns (TYP.) A T V cc = 5 V LOW POWER DISSIPATION Ice = 1 (iA (MAX.) AT Ta = 25 "C HIGH NOISE IMMUNITY V n ih = V n il = 28 % Vcc (MIN.)

Contextual Info: GD54/74HC09, GD54/74HCT09 QUAD 2-INPUT AND GATES WITH OPEN-DRAIN OUTPUTS General Description These devices are identical in pinout to the 54/74LS09. They contain four independent 2-Input AND gates. The open-drain outputs require pull-up resistors to perform correctly. With suitable pull-up

54LS09

Abstract: 54LS09DMQB 54LS09FMQB DM54LS09J DM54LS09W DM74LS09 DM74LS09M DM74LS09N E20A J14A
Contextual Info: E M IC D N D U C T O R t DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs General Description Pull-U p Resistor Equations This device contains four independent gates each of which perform s the logic A N D function. T he open-collector outputs require external pull-up resistors fo r proper logical operation.

CON32A

Abstract: SRM20256LM10 SED1352 interfacing lcd with 8086 SED1352F0B T724AB A1015 equivalent smd transistor va6 va6 smd MC68000
Contextual Info: SED1352F0B Dot Matrix Graphics LCD Controller SED1352F0B TECHNICAL MANUAL Issue Date: 06/03/96 Copyright 1996 S-MOS Systems Inc. All rights reserved. This document, and any text derived, extracted or transmitted from it, is the sole property of S-MOS Systems Inc. and may not be used, copied,

SED1352

Abstract: CON32A lcd 2X16 Epson lcd Epson 2x16 74ls00 SED1352FOB 2n3905 CON40A I8086 SMD LD3
Contextual Info: SED1352 Graphics LCD Controller SED1352 TECHNICAL MANUAL Document Number: X16B-Q-001-06 Copyright 1997, 1998 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

S1D13305F00

Abstract: smd transistor va6 S1D13806F lcd seiko EPSON smd transistor SA4 S1D13706F00 s1d13305f0 S1D13704F00 S1D13806F00 QFP15-100-STD
Contextual Info: MF1020-02 S1D13503 Series Technicl Manual Dot Matrix Graphics LCD Controller S1D13503 Series Technical Manual S1D13503 Series Technical Manual ELECTRONIC DEVICES MARKETING DIVISION EPSON Electronic Devices Website http://www.epson.co.jp/device/ This manual was made with recycle papaer,

interfacing of lcd with 8086

Abstract: S1D13503F00A interfacing lcd with 8086 S1D13502 5 x 7 DOT MATRIX AND 74LS374 DIAGRAM circuit diagram using 74ls374 and dot matrix display CON32A 74LS00 smd transistor va6 block diagram of lcd display 16x4
Contextual Info: S1D13503 Graphics LCD Controller S1D13503 TECHNICAL MANUAL Issue Date: 01/01/30 Document Number: X18A-Q-001-07 Copyright 1997, 2001 Epson Research and Development, Inc. All Rights Reserved. Information in this document is subject to change without notice. You may download and use this document, but only for your own use in

SED1353

Abstract: lcd seiko EPSON DW020 smd transistor 1g5 transistor a015 SMD Interface 8Kx8 RAM memory using with 8086 to-92 type AN410 G7 SED1353F0A CON32A
Contextual Info: SED1353 Color LCD Graphics Controller SED1353 TECHNICAL MANUAL Issue Date: 04/01/97 Drawing Office No. X18A-Q-001-01 Copyright 1997 S-MOS Systems Inc. All rights reserved. VDC This document, and any text derived, extracted or transmitted from it, is the sole property of S-MOS Systems Inc. and may not be used, copied,

sidewinder force feedback

Abstract: micro servo 9g how to control sidewinder force feedback 2 7406 ic IC LM319 IC 74LS04 LMS 7805 ic LM339 5BA DIODE IC 74LS02
Contextual Info: Maintenance Manual CORPORATION SIDEWINDER Va" Streaming Cartridge Tape Drive M A IN TEN A N C E M A N U A L PART NUMBER 20109—001B COPYRIGHT 1982 ARCHIVE CORPORATION MAINTENANCE MANUAL SIDEWINDER TABLE OF CONTENTS Paragraph Title CHAPTER 1.1 1.2 1.2.1 1.2.2

Contextual Info: 5QE D 44^503 G01341Q 5 HITACHI/ L0GIC/ARRAYS/MÉÎ1 0 H IT A C H I S e p t e m b e r , 1985 CMOS GATE ARRAYS i HD61 SERIES DESIGNER'S MANUAL AND PRODUCT SPECIFICATION HITACHI/ LOGIC/ARR'A YS/MEM SQE D • 4 4TLS03 0G13411 4 T -42-11-09 CMOS GATE ARRAYS HD61 SERIES

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

74l502

Abstract: Am8251-Am9551 Am8251 AM8255 SRC S 12VDC 74L527 logic diagram of ic 7432 isbc901 zilog z8001 8kx8 RAM
Contextual Info: Advanced Micro Computers A subsidiary of Advanced Micro Devices H Am 96/4018 AmZ8000 Evaluation Board User’s Manual 059910622-001 $10.00 REVISION RECORD REVISION 01 DESCRIPTION Preliminary Issue 7 /1 3 /8 1 A Manual Released (8 /2 1 /8 1 ) Publication No.