74HCT0 Search Results

74hc02 specifications

Abstract: SCHS125A 74HC02
Contextual Info: [ /Title CD74H C02, CD74H CT02 /Subject (High Speed CMOS Logic Quad Two- CD54/74HC02, CD54/74HCT02 Data sheet acquired from Harris Semiconductor SCHS125A High Speed CMOS Logic Quad Two-Input NOR Gate March 1998 - Revised May 2000 Features Description • Buffered Inputs

74HCT08A

Abstract: DL129 HCT08A LS08 MC54HCTXXAJ MC74HCTXXAD MC74HCTXXAN
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input AND Gate with LSTTL-Compatible Inputs MC54/74HCT08A High–Performance Silicon–Gate CMOS The MC54/74HCT08A may be used as a level converter for interfacing TTL or NMOS outputs to high–speed CMOS inputs.

hct08g

Abstract: 74hct08 74HCT08DR2G 74HCT08DTR2G HCT08 LS08
Contextual Info: 74HCT08 Quad 2−Input AND Gate With LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS The 74HCT08 is identical in pinout to the LS08. The device has TTL−compatible inputs. http://onsemi.com Features • • • • • • • • • •

74hct07

Abstract: 74LS07 TTL 74ls07 TTL 74ls07 M54HCT07 LOW POWER CMOS LOGIC FAMILIES M74HCT07 54HCT07
Contextual Info: HS-C MOS INTEGRATED CIRCUITS a4 PRODUCT PREVIEW HEX BU FFER DESCRIPTION The M 54/74HCT07 is a high speed CMOS HEX BU FFER fa b ric a te d in s ilic o n gate C zMOS technology. It has the same high speed perform ance of LSTTL combined with true CMOS low power consumption.

Contextual Info: 74HC04; 74HCT04 Hex inverter Rev. 4 — 3 August 2012 Product data sheet 1. General description The 74HC04; 74HCT04 is a hex inverter. The inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Contextual Info: 74LV00 Quad 2-input NAND gate Rev. 03 — 20 December 2007 Product data sheet 1. General description The 74LV00 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC00 and 74HCT00. The 74LV00 provides a quad 2-input NAND function.

Contextual Info: 74HC00; 74HCT00 Quad 2-input NAND gate Rev. 6 — 14 December 2011 Product data sheet 1. General description The 74HC00; 74HCT00 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

74hct04a

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HCT04 A Advance Inform ation Hex Inverter w ith LSTTLCom patible Inputs High-Performance Silicon-Gate CMOS The M C54/74HCT04A m ay be used as a level converter for interfacing TTL or N M O S outputs to High-Speed C M OS inputs.

74HC08

Abstract: 74HCT08 74HC08D 74HC08DB 74HC08N 74HCT08D 74HCT08N 74HC08PW
Contextual Info: Philips Semiconductors Product specification Quad 2-input AND gate 74HC08; 74HCT08 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL . They are specified in compliance with JEDEC

74HC03

Contextual Info: Technical Data CD54/74HC03 CD54/74HCT03 File Number 1832 High-Speed CMOS Logic Quad 2-Input NAND Gate With Open Drain Type Features: • Buttered inputs ■ Typical propagation delay = 8 ns @ Vcc = 5 V, C l - 15 pF, 7* = 25° C ■ Output pull-up to 10 V FUNCTIONAL DIAGRAM

74hc04 fan-out

Abstract: 74HC04
Contextual Info: Technical Data CD54/74HC04 CD54/74HCT04 File N u m be r 1471 High-Speed CMOS Logic i i Vcc f — — 6A 6A Hex Inverter Zz* i — 't ls 5A Type Features: 5y • Input and Output are both buttered • Typical propagation delay = 6 ns @ Vcc = 51/, CL = 15 pF, r * = 25° C

74HCT04

Abstract: 74HCT04DR2G 74HCT04DTR2G HCT04 HCT04A LS04 74HCT04 Pin Diagram HCT04g
Contextual Info: 74HCT04 Hex Inverter With LSTTL−Compatible Inputs High−Performance Silicon−Gate CMOS The 74HCT04 may be used as a level converter for interfacing TTL or NMOS outputs to High−Speed CMOS inputs. The HCT04A is identical in pinout to the LS04. http://onsemi.com

Contextual Info: 74HC04-Q100; 74HCT04-Q100 Hex inverter Rev. 1 — 12 July 2012 Product data sheet 1. General description The 74HC04-Q100; 74HCT04-Q100 is a hex inverter. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of

74hc080

Contextual Info: 74HC08-Q100; 74HCT08-Q100 Quad 2-input AND gate Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC08-Q100; 7 4HCT08-Q100 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in

74HC_HCT02

Abstract: NXP 74HC family characteristics 74HC02 74HC02P 74HCT02 74hc02n 74hc02 specifications
Contextual Info: 74HC02; 74HCT02 Quad 2-input NOR gate Rev. 4 — 4 September 2012 Product data sheet 1. General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL .

74HC-HCT04

Abstract: 74HC04DB 74HC04PW 74HC04 for 74hc04 74HC04 equipment hct04 Z148 nxp 74hc04n 74HC04BQ
Contextual Info: 74HC04; 74HCT04 Hex inverter Rev. 4 — 3 August 2012 Product data sheet 1. General description The 74HC04; 74HCT04 is a hex inverter. The inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Contextual Info: Technical Data CD54/74HC04 CD54/74HCT04 File N um ber 1471 High-Speed CMOS Logic rv -i_3f 3* p —• — C6A A I 5A — * 5Ÿ Hex Inverter Type Features: ■ Input and O utput are both buttered • Typical propagation delay = 6 n s @ V cc - 5V, CL = 15 pF, T* = 25° C

74HC08

Abstract: 74HC08 data sheet 74HC/HCT08 74HC08* TSSOP14 74hc08n datasheet 74HC08D 74HC08DB 74HC08N 74HCT08 74HCT08D
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC08; 74HCT08 Quad 2-input AND gate Product specification Supersedes data of 1990 Dec 01 2003 Jul 25 Philips Semiconductors Product specification Quad 2-input AND gate 74HC08; 74HCT08 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A

74HC03

Abstract: SJ652
Contextual Info: T -H 3 -2 J -0 C Technical Data CD54/74HC03 CD54/74HCT03 HARRIS SEMICOND File Number SECTOR 27E D 4302271 1832 00174t>3 1 « ¡ H A S High-Speed CMOS Logic 1A ’ IB— 2A-4 28-5 3A-9 10 30- Quad 2-Input NAND Gate With Open Drain H T yp e Features:

74HCT08

Abstract: 74HC08 74hct08 philips 74HC08D 74HC08DB 74HC08N 74HCT08D 74HCT08N MNA221 SC-501-14
Contextual Info: Philips Semiconductors Product specification Quad 2-input AND gate 74HC08; 74HCT08 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A The 74HC/HCT08 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL LSTTL . They are specified in compliance with JEDEC

74HC02

Abstract: 74HCT02 74HCT02D 74HC02D 74HC02DB 74HC02N 74HCT02DB 74HCT02N JESD22-A114E
Contextual Info: 74HC02; 74HCT02 Quad 2-input NOR gate Product data sheet 1. General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL LSTTL . The 74HC02; 74HCT02 provides a quad 2-input NOR function.

Contextual Info: 74HC03-Q100; 74HCT03-Q100 Quad 2-input NAND gate Rev. 1 — 4 July 2013 Product data sheet 1. General description The 74HC03-Q100; 74HCT03-Q100 is a quad 2-input NAND gate with open-drain outputs. Inputs include clamp diodes that enable the use of current limiting resistors to

74HCT04

Abstract: for 74hc04 74HC04 74HC04DB 74HC04N APPLICATION 74HCT04 datasheet DIP14, inverter, high voltage 74HC04PW 74HC04 data sheet 74HCT04 Pin Diagram
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74HC04; 74HCT04 Hex inverter Product specification Supersedes data of 1993 Sep 01 2003 Jul 23 Philips Semiconductors Product specification Hex inverter 74HC04; 74HCT04 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A

74hc080

Contextual Info: 74HC08-Q100; 74HCT08-Q100 Quad 2-input AND gate Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC08-Q100; 7 4HCT08-Q100 is a quad 2-input AND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in