74ALS109 Search Results
74ALS109 Result Highlights (3)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| SN74ALS109AD | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC 0 to 70 |
|
||
| SN74ALS109AN | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-PDIP 0 to 70 |
|
|
|
| SN74ALS109ANSR | Texas Instruments | Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SO 0 to 70 |
|
|
74ALS109 Datasheets (8)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| 74ALS109A | Philips Semiconductors | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 91.62KB | 9 | ||
| 74ALS109A | Signetics | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 136.36KB | 5 | ||
| 74ALS109AD | Philips Semiconductors | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 91.61KB | 9 | ||
| 74ALS109AD | Signetics | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 136.36KB | 5 | ||
| 74ALS109AD | Signetics | Dual J-KPosltlve Edge-Triggered Flip-Flops With Set and Reset | Scan | 603.11KB | 10 | ||
| 74ALS109AN | Philips Semiconductors | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 91.61KB | 9 | ||
| 74ALS109AN | Signetics | Dual J-K positive edge-triggered flip-flop with set and reset | Original | 136.36KB | 5 | ||
| 74ALS109AN | Signetics | Dual J-KPosltlve Edge-Triggered Flip-Flops With Set and Reset | Scan | 603.11KB | 10 |
74ALS109 Price and Stock
Texas Instruments SN74ALS109ANFlip Flops Dual |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
SN74ALS109AN | 1,648 |
|
Buy Now | |||||||
|
SN74ALS109AN | 2,315 |
|
Get Quote | |||||||
|
SN74ALS109AN | 16,292 | 1 |
|
Get Quote | ||||||
|
SN74ALS109AN | 25 |
|
Get Quote | |||||||
|
SN74ALS109AN | 500 |
|
Get Quote | |||||||
|
SN74ALS109AN | 350 |
|
Buy Now | |||||||
Texas Instruments SN74ALS109ADFlip Flops Dual Pos-Edge-Trig J -K Flip-Flop |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
SN74ALS109AD | 949 |
|
Buy Now | |||||||
|
SN74ALS109AD | 5,507 | 1 |
|
Buy Now | ||||||
|
SN74ALS109AD | 25 |
|
Get Quote | |||||||
Texas Instruments SN74ALS109ANSRFlip Flops Dual Pos-Edge-Trig J -K Flip-Flop |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
SN74ALS109ANSR |
|
Get Quote | ||||||||
|
SN74ALS109ANSR | 12,000 | 1 |
|
Buy Now | ||||||
|
SN74ALS109ANSR | 2,000 |
|
Get Quote | |||||||
Texas Instruments SN74ALS109ADRFlip Flop JK# -Type Pos-Edge 2-Element 16-Pin SOIC T/R |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
SN74ALS109ADR | 13,798 |
|
Get Quote | |||||||
|
SN74ALS109ADR | 10,000 | 1 |
|
Buy Now | ||||||
|
SN74ALS109ADR | 1,925 |
|
Get Quote | |||||||
|
SN74ALS109ADR | 2,200 |
|
Buy Now | |||||||
National Semiconductor Corporation DM74ALS109ANFlip Flop JK# -Type Pos-Edge 2-Element 16-Pin PDIP Rail |
|||||||||||
| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
|
DM74ALS109AN | 384 |
|
Get Quote | |||||||
74ALS109 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: Philips Sem iconductors Product specification 7A. Q1flQ. Dual J-K positive edge triggered flip-flop with set and reset PIN CONFIGURATION DESCRIPTION The 74ALS109A is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and |
OCR Scan |
74als109a | |
1u9aContextual Info: Philips Semiconductors Product specification Dual J-K positive edge triggered flip-flop with set and reset DESCRIPTION PIN CONFIGURATION The 74ALS109A is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and |
OCR Scan |
74als109a74als500nssc00005+1 | |
3rw 44
Abstract: 74ALS109A 74ALS109AD 74ALS109AN SM15C
|
OCR Scan |
74als109aals109a74als500ns+4 | |
74ALS
Abstract: 74ALS109A 74ALS109AD 74ALS109AN SC00042
|
Original |
74als109a74als74als109ad74als109an+1 | |
TEXTOOL zif 40 pin socket
Abstract: MS-012-AB 74ALS 74ALS109A 74ALS109AD 74ALS109AN SOL-24
|
OCR Scan |
74als109aals109a5m-1982eounterdock-22+6 | |
piezo switch
Abstract: latching relay 35168 74ALS109
|
Original |
piezo switchlatching relay3516874als109 | |
piezo for pressure
Abstract: piezo switch
|
Original |
piezo for pressurepiezo switch | |
|
Contextual Info: MITSUBISHI ALSTTLs M 74ALS1035P TËJ MITSUB ISH I {DGTL LOGIC} Q012732 G | HEX NONINVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT / DESCRIPTION PIN CONFIGURATION TOP VIEW ” T h e M 7 4 A L S 1 0 3 5 P is a s e m ic o n d u c to r in te g ra te d c ir c u it c o n s is tin g o f six n o n -inverting b u ffe rs w ith open |
OCR Scan |
74als1035pq01273216p2p16-pin+5 | |
ci la 7610Contextual Info: c +e MITSUBISHI ALSTTLs . op,00° M 74A L S 620A -1P v ie N v t ^s ^ - 3 _ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION The M74ALS6Í20A-1P is a semiconductor integrated cir cuit consisting of eight bus transm itter/receiver circuits |
OCR Scan |
m74als616p2p16-pin150mil+5 | |
ci la 7610Contextual Info: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 1 P 7 -52-3/ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED 6249827 MITSUBISHI 91 D 12674 (DGTL LOGIC ) DESCRIPTION The M74ALS651P is a semiconductor integrated circuit consisting of eight bus transceiver/registers with 3-state |
OCR Scan |
m74als651p16p2p16-pin150mil+5 | |
|
Contextual Info: MITSUBISHI íDGTL LOGICI TI DEI't.E4*1ñ27 D0ia3flD S MITSUBISHI ALSTTLs M 624 9 82 7 M IT S U B IS H I DG TL L O G IC 7 4 A 91D L S 1 1 3 A P 12380 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP -FLO P W IT H SET T -H (* -o 7 -o y DESCRIPTION PIN CONFIGURATION (TOP VIEW) |
OCR Scan |
74als113ap16p2p16-pin150mil+3 | |
m74als191pContextual Info: ÍDGTL LOGIC} 91D TI De | 12446 b241fl27 □ 0 1 2 4 4b ñ r D MITSUBISHI ALSTTLs M 74A LS191P SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER W ITH MODE CONTROL • 7 ^ V ' 5 ' ' ^ >3 DESCRIPTION - o 7 PIN CONFIGURATION TOP VIEW Th e M 7 4 A L S 1 9 1 P is a s e m ic o n d u c to r in te g ra te d c irc u it |
OCR Scan |
b241fl27ls191p16p2p16-pin+6 | |
74ALS640Contextual Info: MITSUBISHI -CDGTL LOGIC} dT | ba^flS? D O i a k b B 4 M ITSUBISHI A L ST T Ls sc* -s s 5 " : . M 7 4 A LS6 4 7 P ,o.9B OCTAL BUS TR A N SC EIV ER /R EG IST ER WITH OPEN COLLECTOR OUTPUT NONINVERTED 6249827 MITSUBISHI CDGTL LOGTC) DESCRIPTION The M74ALS647P is a semiconductor integrated circuit |
OCR Scan |
m74als647p16p2p16-pin150mil+5 | |
74ALS131
Abstract: 74als245a m74als138p 74als169b 74ALS193D
|
OCR Scan |
74als131pm74als131p16p2p16-pin+10 | |
|
|
|||
J 5027 R
Abstract: BEM 6K
|
OCR Scan |
g0127ssm74als1621ap74als621ap16p2p+8 | |
|
Contextual Info: MITSUBISHI -CDGTL L O G I O TI DE | bSMTfla? 001E4b4 □ M IT SU B ISH I ALSTTLs M74ALS241AP 6249827 MITSUBISHI DGTL LOGIC 91D 12464 D O CTAL B U F F E R /L IN E D R IV E R W IT H 3 -ST A T E O U T PU T (N O N IN V E R T E D ) DESCR IPTIO N The M74ALS241AP is a semiconductor integrated circuit |
OCR Scan |
001e4b4m74als241ap16p2p16-pin+5 | |
|
Contextual Info: MITSUBISHI ALSTTLs & M74ALS169BP T ' - v ’S '- J J - o SYNCHRONOUS PRESETTABLE UP/DOWN 4 -B IT BINARY COUNTER 6249827 MITSUBISHI DG TL LOGIC DESCRIPTION Th e M 74A L S 169 B P is a sem iconductor integrated circuit of a synchronous p resettable u p /d o w n |
OCR Scan |
m74als169bp16p2p16-pin150mil+3 | |
74als561Contextual Info: MITSUBISHI íDGTL LOGIC} "DÌI bSMTñE? 00123ki7 5 TI W~ M IT S U B IS H I* !L. S T T L s M74ALS38AP 91D 12367 D 6249827 MITSUBISHI DGTL LOGIC QUADRUPLE 2 -IN P U T P O S ITIV E NAND BUFFER W IT H OPEN COLLECTOR OU TPUT T - - V 3 - / S DESCRIPTION PIN CONFIGURATION (TOP VIEW) |
OCR Scan |
00123ki7m74als38ap150mil16p2p+5 | |
|
Contextual Info: "d ë J M ITS UBISHI -CDGTL L O G I O bEMTfla? ooiBS'in a S^Ls MITSUBISHI ALSTTLs M 74ALS133P r _ 6249827 MITSUBISHI - y j - / r SINGLE 13-IN PU T POSITIVE NAND GATE DGTL LOGIC DESCRIPTION Th e M 7 4A LS 133P is a sem iconductor integrated circuit |
OCR Scan |
74als133p13-in13-input16p2p+6 | |
m74als
Abstract: M74ALS109AP 74ALS640
|
OCR Scan |
m74als109ap16p2p16-pin150mil+6 | |
gt 568
Abstract: m74als568ap m74als568a
|
OCR Scan |
1h24982716p2p150mil20p2v+5 | |
M74ALS1032APContextual Info: MITSUBISHI ALSTTLs M 74ALS1 0 3 2 AP M I T S U B I S H I - C D G T L L O G I C } T I D È I ” L ^ M ^ ñ S ? 1 2 7 5 fi QUADRUPLE 2-IN P U T POSITIVE OR BUFFER _ DESCRIPTION _ _ _ _ PIN CONFIGURATION TOP VIEW The M74ALS1032AP is a semiconductor integrated cir |
OCR Scan |
74als1m74als1032ap16p2p16-pin+5 | |
Philips Semiconductors Selection Guide
Abstract: 74ALS08
|
OCR Scan |
74als04b74als00a74als10a74als20a+7 | |
synchronous inverter schematic ims 1600
Abstract: elcot tv kit circuit diagram iosq 050 pin diagram for IC cd 1619 cp in fm smd code transistor sd IL44 Z ET 439 IL44 transistor ksv3100a UTM ceramic RESISTOR 390 210-9
|
OCR Scan |
t22v10at22v10at22v10bat22v10lat22lv10at22lv10latf22v10batf22v10bla+16 | |