74F384 Search Results

x7 frequency multiplier

Abstract: AM25LS14
Contextual Info: co co National Semiconductor 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description device. An asynchronous Parallel Load PL input clears the internal flip-flops to the start condition and enables the X latches to accept new multiplicand data. The Parallel Load

carry save adder

Contextual Info: 384 54F/74F384 Connection Diagrams 8-Bit Serial/Parallel Tw os Complement M ultiplier PL [7 ~nn Description The ’F384 is an 8-bit by 1-bit sequential logic element that m ultiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internally to produce a twos complement

carry save adder

Abstract: F384 74F384 N74F384D N74F384N
Contextual Info: FAST 74F384 Signetics Multiplier 8-Bit Serial/Parallel Two's Complement Multiplier Preliminary Specification FAST Products FEATURES DESCRIPTION The 'F384 is an 8-bit sequential logic element that multiplies two numbers rep­ resented In Two's Complement notation.

74F10

Abstract: F384 AM25LS14
Contextual Info: July 1989 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description The ’F384 is an 8 -bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth's algorithm internal­

carry save adder

Abstract: 8 shift register by using D flip-flop shift register by using D flip-flop Twos Complement Adder/Subtractor F384 K/1574-X6
Contextual Info: 384 54F/74F384 Connection Diagrams 8-Bit Serial/Parallel Twos Com plement M u ltiplier Description The ’ F384 is an 8-bit by 1-bit sequential logic elem ent that m u ltip lie s tw o num bers represented in tw os com plem ent notation. The device im plem ents B oo th’s algorithm in te rna lly to produce a tw os com plem ent

Contextual Info: FAST 74F384 Signetics M ultiplier 8-Bit Serial/Parallel Two's Complement Multiplier Preliminary Specification FAST Products FEATURES DESCRIPTION The 'F384 is an 8-bit sequential logic element that multiplies two numbers rep­ resented in Two's Complement notation.

carry save adder

Contextual Info: 384 54F/74F384 C onnection Diagrams 8-Bit Serial/Parallel Twos Complement M ultiplier Description The 'F384 is an 8-bit by 1-bit sequential logic element that m ultiplies two numbers represented in twos complement notation. The device implements Booth’s algorithm internally to produce a twos complement

carry save adder

Abstract: 74F384 F384 N74F384D N74F384N
Contextual Info: FAST 74F384 Multiplier 8-Bit S e rial/P a ra lle l T w o ’s C o m p lem ent M ultiplier Preliminary Specification FAST Products FEATURES • 8-bit by 1-bit sequential logic element • Multiplies two numbers represented in Two's Complement • Parallel inputs accept and store

74F10

Abstract: F384 EZ 830
Contextual Info: National Semiconductor July 1989 54F/74F384 8-Bit Serial/Parallel Twos Complement Multiplier General Description The ’F384 is an 8 -bit by 1-bit sequential logic element that multiplies two numbers represented in twos complement notation. The device implements Booth's algorithm internal­

74F161 PC

Abstract: 74F163PC 74f500 74f558 74F164PC 74F548PC 74F138d 74F547PC transistor f630 74F253DC
Contextual Info: F a ir c h ild A d v a n c e d S c h o t t k y T L $ 3. HANDLING PRECAUTIONS FOR SEMICONDUCTOR COMPONENTS The follow ing handling precautions should be observed for oxide isolation, shallow junction processed parts, such as FAST or 100K ECL: 1. All Fairchild devices are shipped in conducting foam or anti­

BPW22A

Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
Contextual Info: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey

8 bit bcd adder subtractor

Abstract: 4 bit serial subtractor bcd subtractor binary 4 bit serial subtractor 4 Bit BCD Subtractor 4-bit bcd subtractor
Contextual Info: NATIONAL SENICOND {LOGIC} L.S0115S □Dbö3QS û 31E D Function 8-Input : Dual 4-Input Quad 2-Input Quad 2-Input Inverting 8-Input (TRI-STATE) Dual 4-Input (TRI-STATE) . / Quad 2-Input (TRI-STATE) Quad 2-Input (TRI-STATE, Inverting) 4-Input w/Shift (TRI-STATE)

74F322

Abstract: 74F322PC 74F384 MS-001
Contextual Info: Revised April 1999 74F322 Octal Serial/Parallel Register with Sign Extend General Description The 74F322 is an 8-bit shift register with provision for either serial or parallel loading and with 3-STATE parallel outputs plus a bi-state serial output. Parallel data inputs and parallel outputs are multiplexed to minimize pin count. State

SRG8 Multiplexer

Abstract: 74F322 74F322PC 74F384 MS-001
Contextual Info: R PriM9H8!? , 1QQQ Revised Aprii 1999 74F322 Octal Serial/Parallel Register with Sign Extend General Description parallel load. An asynchronous M aster Reset MR input overrides clocked operation and clears th e register. The 74F 322 is an 8 -bit shift register w ith provision fo r either