74ALS1 Search Results

Contextual Info: S IM 54ALS1 0 1 0A , SIM 74ALS1 □ 1 0 A TRIPLE 3 INPUT POSITIVE N A N D B U FFE R S D 2 6 6 1 , A P R IL 1 9 8 2 • Buffer Version of 'A LS 10A • Package Outline” Addition Ceramic S N 74A LS 1010A . . . D O R N • -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 1 0 1 0 A . . . J PACKAGE

74AS1034

Abstract: LS1034
Contextual Info: TYPES SN54ALS1034, SN54AS1034, 74ALS1034, SN74AS1034 HEX DRIVERS D 2 6 6 1 . A P R IL 1 9 8 2 - R E V I S E D D E C E M B E R 1 9 8 3 'A S 1 0 3 4 O ffers High Capacitlve-Drive Capability SN 54ALS1034. S N 54A S1034 . . . J PACKAGE SN 74ALS1034, S N 74A S1034 . . . N PACKAGE

74ALS193

Abstract: MR 1501 RT 1601 a LCD MS-012-AB 74ALS N74ALS193D N74ALS193N SOL-24
Contextual Info: Signetics 74ALS193 Counter Synchronous Presettable 4-Bit Binary Counter With Seperate Up and Down Clocks Preliminary Specification ALS Products TYPE TYPICAL f M*x TYPICAL SUPPLY CURRENT TOTAL FEATURES • Synchronous, reversible counting • Asynchronous parallel load capa­

LS1639

Abstract: 74ALS1639
Contextual Info: TYPES SN 54A LS1638, S N 54A LS1639, SN 74 A LS1 638 , S N 7 4 A LS 1 639 OCTAL BU S TRANSCEIVERS D2661, DECEMBER 1982-REVISED DECEMBER 1983 Bidirectional Bus Transceivers in High-Density 20-Pin Packages S N 54A LS 1638, S N 54A LS 1639 J PAC KA G E S N 74A LS 1638, S N 74ALS1639

74LS643

Abstract: 74LS643-1 74ALS643 74245 rca 645 BC 641 74643 84 JRC 74LS639 74LS640
Contextual Info: - 278- 74643 VCC DIR Octal 3-State Bus Transceiver C 81 A1 A2 62 A3 83 84 06 66 A4 A5 A6 A7 74LS643-1, 74ALS643-1 l i 74ALS1643-1 l± I o l 24mA 87 88 AS GNO Io l 48mA F U N C T IO N T A B L E CO NTROL OPERATION INPUTS 638 640 639 641 643 m a *'j' x-n tpd

DM54ALS13J

Abstract: DM74ALS DM74ALS13M DM74ALS13N J14A M14A N14A DM74ALS13
Contextual Info: DM54ALS 13/DM 74ALS13 Dual 4-Input NAND Gates with Schmitt Trigger Inputs General Description Switching specifications guaranteed over full tempera­ ture and V cc range Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin-for-pin compatible with Schottky

74ALS191N

Abstract: 74ALS 74ALS191 74ALS191D
Contextual Info: 74ALS191 C ounter Up/Down Binary Counter With Reset and Ripple Clock Preliminary Specification FEATURES • Synchronous, reversible counting • Asynchronous parallel load capa­ bility • Cascadable without external logic • Single up/down control input

74ALS151

Abstract: ALS251 74ALS N74ALS151N
Contextual Info: 74ALS151 Multiplexer 74ALS151 8-Input Multiplexer Preliminary Specification FEATURES • 8 -to -1 m u lt ip le x in g • O n c h i p d e c o d in g • M u lt if u n c t io n c a p a b il i t y • C o m p le m e n t a r y o u t p u t s • S e e 'A L S 2 5 1 f o r 3 - s t a t e v e r s io n

ALS161

Abstract: MS-012-AB 74ALS 74ALS161 74ALS161B 74ALS161BD 74ALS161BN 74ALS163B 74ALS163BD 74ALS163BN
Contextual Info: Signetics bbSBTSM OGMÜSlb fi • SIC3 1ÖE D NAPC/ SIGNETICS 74ALS161 B,74ALS163B Counters ALS Products FEATURES • Synchronous counting and loading • Two count enable Inputs for n-blt cascading • Positive edge-triggered d ock • Asynchronous Reset 'ALS161B

Contextual Info: MITSUBISHI ALSTTLs M 74ALS1035P TËJ MITSUB ISH I {DGTL LOGIC} Q012732 G | HEX NONINVERTING BUFFER W ITH OPEN COLLECTOR OUTPUT / DESCRIPTION PIN CONFIGURATION TOP VIEW ” T h e M 7 4 A L S 1 0 3 5 P is a s e m ic o n d u c to r in te g ra te d c ir­ c u it c o n s is tin g o f six n o n -inverting b u ffe rs w ith open

M74ALS09

Abstract: M74ALS74 dd127 M74ALS257 M74ALS05 m74als32 m74als561 m74als245 20P2V M74ALS04
Contextual Info: MITSUBISHI íDGTL L0GIC3- TI ]>ËÏ bSMTBE? 0 0 i a 4 3 c] 1 T • ■ MITSUBISHI ALSTTLs 74ALS175P ”6 2 4 9 8 2 / MITSUBISHI DGTL LOGIC 91D 1 2 43 9 D QUADRUPLE D-TYPE FLIP FLOP W ITH RESET DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M 74ALS175P is a sem iconductor integrated circuit

74ALS131

Abstract: 74als245a m74als138p 74als169b 74ALS193D
Contextual Info: M IT S U B IS H I -CDGTL L O G I C } TI 0 F | b E 4 ciflE 7 0 D lE 3 flt b |~ _ 6249827 MITSUBISHI I M IT SU B ISH I ALSTTLs M 74ALS131P <DG T L LO GI C 91D 12386 D 3 -L IN E TO 8 -L IN E D E C O D E R /D E M U L T IP L E X E R W IT H A D D R E S S R E G IS T E R

Contextual Info: "d ë J M ITS UBISHI -CDGTL L O G I O bEMTfla? ooiBS'in a S^Ls MITSUBISHI ALSTTLs M 74ALS133P r _ 6249827 MITSUBISHI - y j - / r SINGLE 13-IN PU T POSITIVE NAND GATE DGTL LOGIC DESCRIPTION Th e M 7 4A LS 133P is a sem iconductor integrated circuit

M74ALS1032AP

Contextual Info: MITSUBISHI ALSTTLs M 74ALS1 0 3 2 AP M I T S U B I S H I - C D G T L L O G I C } T I D È I ” L ^ M ^ ñ S ? 1 2 7 5 fi QUADRUPLE 2-IN P U T POSITIVE OR BUFFER _ DESCRIPTION _ _ _ _ PIN CONFIGURATION TOP VIEW The 74ALS1032AP is a semiconductor integrated cir­

Contextual Info: Philips Sem iconductors Product specification Dual 1-of-4 decoder/demultiplexer 74ALS139 PIN CONFIGURATION FEATURES • Dem ultiplexing capability Ea [T m • Multi-function capability AOa [T T 5] Ëb DESCRIPTION QOa The 74ALS139 is a dual 1 -of-4 decoder/dem ultiplexer. This device

Contextual Info: Philips Sem iconductors Product specification 7A. Q1flQ. Dual J-K positive edge triggered flip-flop with set and reset PIN CONFIGURATION DESCRIPTION The 74ALS109A is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and

Contextual Info: Philips Semiconductors Product specification 8-input multiplexer 74ALS151 FEATURES PIN CONFIGURATION • 8-to-1 multiplexing • On chip decoding I3 [ 7 • Multi-function capability I2 • Complementary outputs QF r ^ n m vcc Ï5 ] I4 n [T Ü is io [ 7 Ï3j I6

Philips Semiconductors Selection Guide

Abstract: 74ALS08
Contextual Info: Philips Semiconductors Functional selection guide GATES FUNCTION INVERTERS NAND NOR DEVICE NUMBER NUMBER OF PINS Hex inverters 74ALS04B 14 Quad 2-input 74ALS00A 14 Triple 3-input 74ALS10A 14 Dual 4-input 74ALS20A 14 8-input 74ALS30A 14 Quint 2-input NAND, open collector

SOT27-1 DIP14

Abstract: 74ALS 74ALS11A 74ALS11AD 74ALS11AN SC00023
Contextual Info: INTEGRATED CIRCUITS 74ALS11A Triple 3-Input AND gate Product specification IC05 Data Handbook Philips Semiconductors 1991 Feb 08 Philips Semiconductors Product specification Triple 3-input AND gate TYPE 74ALS11A TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT

74ALS131

Contextual Info: SIM54ALS131, SN54AS131A, 74ALS131, SN74AS131A 3 LINE TO 8-LINE DECODERS/DEMULTIPLEXERS WITH ADDRESS REGISTERS D 2 6 6 1 . APRIL 1 9 8 2 -R E V IS E D M A Y 1 9 8 6 • SN 54A LS131, SN 54A S 131A . . . J PACKAGE SN 74ALS131, S N 74A S 131A . . . D OR N PACKAGE

DS-07 059

Abstract: MS-012-AB RL 1962 74ALS 74ALS164 74ALS164D 74ALS164N SOL-24 TEXTOOL zif 28 pin socket dsb 646
Contextual Info: 74ALS164 Signetics Shift Register 8-Bit Serial-ln Parallel-Out Shift Register Preliminary Specification FEATURES • Gated serial data inputs • Typical shift frequency of 60 MHz •Asynchronous Master Reset • Buffered Clock and Data Inputs • Fully synchronous data transfer

MS-012-AB

Abstract: 74ALS 74ALS153 N74ALS153D N74ALS153N SOL-24
Contextual Info: Signetics 74ALS153 Multiplexer ALS Products Dual 4-Input Multiplexer FEATURES Prelim inary Specification • Non-inverting outputs • Com mon select inputs • Separate enable for each section TYPE • See "ALS253 for 3-State version TYPICAL SUPPLY CURRENT

54ALS10A

Abstract: SN54ALS10A SN54AS10 SN74ALS10A SN74AS10
Contextual Info: 74ALS10A, SN74AS10, SN54ALS10A, SN54AS10 TRIPLE 3-INPUT POSITfVE-NAND GATES M A R C H 1 9 8 4 - R E V I S E D M A Y 1986 • • S N 54ALS10A, SN 54AS10 S N 74ALS10A, SN 74AS10 . . Package O p tio n s In clud e P lastic "S m a ll O u tlin e " Packages, C era m ic C hip C arriers,

74ALS157

Abstract: TEXTOOL zif 40 pin socket MS-012-AB 74ALS 74ALS158 N74ALS157D N74ALS157N N74ALS158D N74ALS158N S1088
Contextual Info: Signetics 74ALS157, 74ALS158 Data Selectors/Multiplexers ALS Products 74ALS157 Quad 2-Input DataSelect/Multiplexer, Noninverting 74ALS158 Quad 2-Input Data Selector/Multiplexer, Inverting Product Specification DESCRIPTION T h e 7 4 A L S 1 5 7 is a Q u ad 2-input multi­