74 AS 07 Search Results

LS 7476

Abstract: 74ls76 7476 LS 74LS76 Jk 7476 JRC FF 30
Contextual Info: 7476 T —? O* i i ~t _J <7 ' l ~ T < N. LS£;Ut 07473 CO 1 6 74 7 6 L_ > 7"x V t- ') (74 LS76 ) -71 - Dual J K -F F s with Preset and Clear A il fmax min CLK tw IN iU * OUT N LS 15 30 21 20 ALS ALSK F S AS AC ACT IIC HCU HCT rain CLK H 20 20 20 ns min

Contextual Info: Pre-Terminated Assemblies 750-100 Adapter to Adapter Pre-Terminated Assemblies Series 72 & 74 Tubing & Series 75 Conduit FOR ADAPTER-TO-ADAPTER APPLICATIONS FOR USE WITH "Y" AND "T" TRANSITION ADAPTERS SUCH AS 710-077 THROUGH 710-120 713-100 THROUGH 713-103

tc74ao-5.0vat

Abstract: TC74AO-5 marking code AC sot 23-5 TC74 MARKING WR sot TheTC74 marking code v6 SOT23 tc744
Contextual Info: ¡eluom Semiconductor, Inc. TC 74 TINY SOT-23 SERIAL DIGITAL THERMAL SENSOR FEATURES • ■ ■ ■ ■ ■ Digital Temperature Sensing in SOT-23-5 Package Outputs Temperature as an 8-Bit Digital Word Simple Serial Port Interface Solid State Temperature S ensing.

TRANSISTOR D 471

Abstract: BF485PN
Contextual Info: Philips Semiconductors For hook switches in equipment such as wired/cordless phones, fax machines and modems, the BF485PN dual transistor offers an ideal, cost-effective solution. Not only is it the first dual high-voltage transistor in a single SC-74 / SOT457 mini surface-mount package,

45n80c

Abstract: 800 coolmos
Contextual Info: IXKN 45N80C CoolMOS Power MOSFET VDSS = 800 V ID25 = 44 A RDS on max = 74 mΩ N-Channel Enhancement Mode Low RDSon, High VDSS MOSFET miniBLOC, SOT-227 B D S G G S E72873 S G = Gate S = Source D = Drain S D Either source terminal at miniBLOC can be used as main or Kelvin Source

tape head preamp circuit

Abstract: ECG1179 Equalizer Amplifier with ALC Philips ECG ECG1180 ECG1228 ECG Semiconductors transistor PRE-AMPLIFIER FOR TAPE RECORDER loco 11
Contextual Info: PHILIPS E C G INC 17E ECG h b S 3T E 3 0004bEfl h D T-74-Û5-.01 ECG1179 Pre-Amplifier S e m ic o n d u c to rs ECG1179 is a monolithic linear integrated cir­ cuit used as a tape recorder pre-amplifier. r. A Features • Low noise, lo w distortion • Includes A L C transistor

MM54C165

Abstract: MM74C165 AN-90
Contextual Info: & D ecem ber 1992 MM54C165/MM74C165 Parallel-Load 8-Bit Shift Register General Description Features The M M 5 4C 1 6 5/M M 74 C 16 5 fu n ctio n s as an 8 -bit para lle l­ load, serial sh ift register. Data is loaded into th e register independent o f th e state o f th e clock s w hen PAR ALLEL

IDT7MPV6202

Abstract: cs 6202 IDT7MPV6207 7MPV6274 49/IDT7MPV6207
Contextual Info: Integrated Device Technology, Inc. 256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS PRELIMINARY IDT7MPV6202/03 IDT7M PV6206/07 IDT7 M PV6273/74 IDT7MPV6275/76 FEATURES DESCRIPTION • For Intel Pentium CPU-based systems using the Intel

PPC-970FX

Abstract: ppc970 PowerPC 970 register set PowerPC Power ISA Architecture PowerPC 970FX Boundary Scan PowerPC 970FX
Contextual Info: IBM PowerPC®970FX RISC Microprocessor Data Sheet Preliminary Electrical Information SA14-2760-07 Version 2.3 Preliminary June 4, 2006 ® Copyright and Disclaimer Copyright International Business Machines Corporation 2005, 2006 All Rights Reserved Printed in the United States of America June 2006

RLOF 100

Abstract: DS34t108 TDM8
Contextual Info: ABRIDGED DATA SHEET Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description 3 The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be

DS34T104GN

Abstract: 3216 footprint IPC TDM8 DS34T101GN DS34T102GN DS34T104 DS34T108GN 7U22 DS34T10x
Contextual Info: Rev: 072707 DS34T101/DS34T102/DS34T104/DS34T108 Single/Dual/Quad/Octal TDM-Over-Packet Chip General Description 3 The IETF PWE SAToP/CESoPSN/TDMoIP/HDLC draft-compliant DS34T108 allows up to eight T1/E1 links or frame-based serial HDLC links to be transported transparently through a switched IP or

74 series

Abstract: Potato Semiconductor 74 Series Logic ICs CERAMIC LEADLESS CHIP CARRIER A115-A C101 PO54G00A PO74G00A PO74G00ASR PO74G00ASU
Contextual Info: PO54G00A, PO74G00A QUADRUPLE 2-INPUT POSITIVE-NAND GATE 09/12/07 54, 74 Series GHz Logic FEATURES: DESCRIPTION: . Patented technology . Specified From –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C . Operating frequency up to 1.125GHz with 2pf load

E5CW

Abstract: PV6274 H30P IDT7MPV6203/07/74
Contextual Info: In te g ra te d D e v iz e T e c h n o lo g y , l i e . 256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS FEATURES PRELIMINARY IDT7MPV6200/01 IDT7MPV6202/03 IDT7MPV6206/07 IDT7MPV6273/74 The IDT7MPV6200/01 use ID T’s 71V256 32K x 8 asyn­

GPLB34

Abstract: GPLB34* v0.1 GPBA01B C000-C7FF
Contextual Info: GPLB34A1 LCD CONTROLLER JAN. 07, 2008 Version 1.4 GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. TECHNOLOGY INC. is believed to be accurate and reliable. Information provided by GENERALPLUS However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may

ic 7407

Abstract: IC 7406 ic 7407 logic symbol SIGNETICS 7406 7406 7407 ic configuration ic 7406 g 7406 function table the pin function of ic 7406 7407 signetics
Contextual Info: Signetics | 7406, 07 Inverter/Buffer/Drivers '06 Hex Inverter B uffer/D river Open Collector '07 Hex B uffer/D river (Open Collector) Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7406 10ns (tPLH) 15ns (tPHL)

ttl 7407

Abstract: 7406 7406 TTL TTL 7406 7406 pin configuration SIGNETICS 7406 7407 7407 TTL 1N3064 74LS
Contextual Info: Signetics | 7406, 07 Inverter/Buffer/Drivers '06 Hex Inverter Buffer/D river Open Collector '07 Hex Buffer/D river (Open Collector) Product Specification Logic Products TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7406 10ns (tPLH) 15ns (tpHÜ

fcom 8a

Contextual Info: IDE D I 4305271 001301E 0 I HARRIS SEMICOND SECTOR HA-2620/883 HARRIS H A -2 6 2 2 /8 8 3 Very W ideband, High Impedance Uncompensated Operational Amplifiers January 1989 T-79-07-10 Features Description • This Circuit Is Processed In Accordance to Mil-Std-

alu 74F382

Abstract: F381 F382 MC74F382 MC74FXXXDW
Contextual Info: For:char Printed on:Mon, Feb 6, 1995 09:49:57 From book:DL121CH4 5 VIEW Document:MC74F382 (5) VIEW Last saved on:Fri, Feb 3, 1995 16:07:09 MC54/74F382 4-BIT ARITHMETIC LOGIC UNIT The MC54/74F382 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional Select input codes force the Function

TNT4882

Abstract: TNT4882AQ pal 013b P87C52 DS1204U TNT4882-AQ PAL 011a ESP-488TL 16V8 TNT4882C
Contextual Info: Application Note 077 Using the TNT4882 in an 8051-Family-Microcontroller-Based System Andrew Thomson Faisal Habib Introduction This application note is written for GPIB instrument designers who use 8051-family microcontrollers. It describes the hardware interface required to create a fully functional GPIB

Contextual Info: date 09/07/2012 page 1 of 5 SERIES: VHD1-DIP │ DESCRIPTION: DC-DC CONVERTER FEATURES • • • • • • • • 1 W isolated output industry standard 17 pin DIP package single unregulated outputs 6,000 V isolation short circuit protection UL safety approvals

Contextual Info: SERIES: VHD1-DIP date 09/07/2012 page 1 of 5 DESCRIPTION: DC-DC CONVERTER FEATURES • • • • • • • • 1 W isolated output industry standard 17 pin DIP package single unregulated outputs 6,000 V isolation short circuit protection UL safety approvals

IDT7MPV6202

Abstract: 82430 7MPV6273 IDT7MPV6207 d478 card fci 7MPV6202 7MPV6274 Intel 82430 8 pin 3150
Contextual Info: Integrated Device Technology, Inc. 256KB AND 512KB SECONDARY CACHE MODULES FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS PRELIMINARY IDT7MPV6202/03 IDT7MPV6206/07 IDT7MPV6273/74 IDT7MPV6275/76 FEATURES DESCRIPTION • For Intel Pentium CPU-based systems using the Intel

BU 3150

Contextual Info: 256KB AND 512KB S E C O N D A R Y CA CH E M O D U L E S FOR THE INTEL PENTIUM CPU AND INTEL 82430 FAMILY CORE LOGIC PCISETS PRELIMINARY I D T7 MP V6 20 2 /03 I D T7 MP V6 20 6 /07 IDT7M PV6273/ 74 I DT 7MPV6 27 5 /76 FEATURES DESCRIPTION • F o r Intel P en tiu m C P U -b a s e d s y s te m s using th e Intel

Contextual Info: ADVANCED ELEC TR O N IC PKG 3=îE D El 05547*13 0 0 G D 3 b7 D E3AEP AEPB232 32 UNE SUPPORT MODULE T - 5 2 'O ^ > > 3 2 line bus interface > > Individual control of each 8 line group. > > High density .070 center spaced ZIP leads for maximum I/O in minimum area.