70V9269 Search Results

256K DPRAM

Abstract: IDT70914 IDT709149 70V261 70V25 70V24
Contextual Info: SYNCHRONOUS DUAL-PORT STATIC RAMS FOR DSP AND COMMUNICATION APPLICATIONS APPLICATION NOTE AN-144 Integrated Device Technology, Inc. By Jeffrey C. Smith ABSTRACT The Sequential Access Random Access Memory The first of the synchronous components to be presented

TSB 36

Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM 70V9269S/L Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12/15ns max.

9269s

Contextual Info: HIGH-SPEED 3.3V 1 6 K x 1 6 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L FEATURES: Full synchronous operation on both ports - 4ns setup to clock and 1 ns hold on all Control, data, and address inputs - Data input, address, and control registers

64Kx8 dual-port CMOS RAM

Abstract: 64Kx8 CMOS RAM BF208 fast sram 100mhz BC256 70V3379 70V9079 70V9089 70V9099 70V9189
Contextual Info: THE MOST COMMONLY ASKED QUESTIONS ABOUT SYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-254 By Cheryl Brennan What is a dual-port? A dual-port SRAM is a single static RAM array with two sets of address, data, and control signals typically left and right for accessing that array.

A14L

Abstract: IDT70V9269
Contextual Info: HIGH-SPEED 3.3V 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

en4900g

Abstract: EME-G600 71V3558X EN4900 EME-G700 7024S55PFG CRM1076 70261S55PFI 72v2111l15pfgi EN-4900
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA - 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: A0811-01 DATE: 26-Mar-2009 MEANS OF DISTINGUISHING CHANGED DEVICES: Product Affected: Selective TQFP Packages (Standard and RoHS)

Contextual Info: HIGH-SPEED 3.3V 1 6 K x 1 6 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L In te g ra te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • • True Dual-Ported m em ory cells which allow sim ulta­ neous access of the sam e m em ory location

Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L Features: * * a cce ss of the sam e memory location Full synchronous operation on both ports High-speed clock to data acce ss - - * additional logic True Dual-Ported memory cells which allow simultaneous

marking thw

Abstract: A13L IDT70V9269 IDT70V9269L IDT70V9269S
Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12/15ns max.

A14L

Abstract: IDT70V9269
Contextual Info: HIGH-SPEED 3.3V 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

A14L

Abstract: IDT70V9269
Contextual Info: HIGH-SPEED 3.3V 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

Contextual Info: HIGH-SPEED 3.3V 1 6 K x 1 6 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70 V9269S/L FEATURES: Full synchronous operation on both ports - 4ns setup to clock and 1ns hold on all Control, data, and address inputs - Data input, address, and control registers

MT 5388 BGA

Abstract: Broadcom 7019 BTS 6000 ericsson alcatel 1511 mux mobile switching center msc ericsson bts 6000 2x4 TTL demultiplexer cisco 2801 ericsson bts Technical specification alcatel 1511
Contextual Info: IDT Product Selector Guide Accelerated Thinking SM Table of Contents Integrated Processors Flow-Control Management Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

BF208

Abstract: 70V3379 70V9079 70V9089 70V9099 70V9189 70V9199 70V9269 70V9279 70V9289
Contextual Info: THE MOST COMMONLY ASKED QUESTIONS ABOUT SYNCHRONOUS DUAL-PORT SRAMS APPLICATION NOTE AN-254 By Cheryl Brennan What is a dual-port? A dual-port SRAM is a single static RAM array with two sets of address, data, and control signals typically left and right for accessing that array.

Contextual Info: HIGH-SPEED 3.3V 1 6 K x 1 6 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L FEATURES: • True Dual-Ported m em ory cells which allow sim ulta­ neous access of the sam e m em ory location • H igh-speed clock to data access — Com m ercial: 9/12/15ns max.

O10L

Contextual Info: HI GH- SPE ED 3.3V 16K x 16 S Y N C H R O N O U S PI PELI NED D U A L - P O R T STATIC RAM PRELIMINARY IDT70 V9269S/L FEATURES: • • • • • • True Dual-Ported m em ory cells which allow sim ulta­ neous access ot the sam e m em ory location High-speed clock to data access

Contextual Info: HIGH-SPEED 3.3V 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

A13L

Abstract: IDT70V9269 IDT70V9269L IDT70V9269S
Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12/15ns max.

L9939

Abstract: h9940 z9939 l9940 k9920 z9936 l9938 P9924 K9932 L9923
Contextual Info: INTEGRATED DEVICE TECHNOLOGY, INC. QUALITY & RELIABILITY MONITORS July 2000 2975 Stender Way, Santa Clara, CA 95054 TEL: 800 345-7015 FAX: (408) 492-8674 QUALITY & RELIABILITY MONITOR REPORT July 2000 TABLE OF CONTENTS Section I: Introduction Section II:

A13L

Abstract: IDT70V9269 IDT70V9269L IDT70V9269S
Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L Integrated Device Technology, Inc. FEATURES: • Full synchronous operation on both ports - 4ns setup to clock and 1ns hold on all Control, data, and address inputs

philips diode PH 33J

Abstract: UM61256FK-15 sem 2106 inverter diagram IDT7024L70GB um61256 UM61256ak sram um61256fk15 HIGH VOLTAGE ISOLATION DZ 2101 C5584 IDT74LVC1G07ADY
Contextual Info: QUICKSWITCH PRODUCTS HIGH-SPEED LOW POWER CMOS 10-BIT BUS SWITCHES QS3L384 QS3L2384 FEATURES/BENEFITS DESCRIPTION • • • • • • • • • The QS3L384 and QS3L2384 provide a set of ten high-speed CMOS TTL-compatible bus switches. The low ON resistance of the QS3L384 allows inputs to be connected to outputs without

Contextual Info: HIGH-SPEED 3.3V 32/16K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 6.5/7.5/9/12/15ns max.

A13L

Abstract: IDT70V9269 IDT70V9269L IDT70V9269S
Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY 70V9269S/L Integrated Device Technology, Inc. FEATURES: • Full synchronous operation on both ports - 4ns setup to clock and 1ns hold on all Control, data, and address inputs

A13L

Abstract: IDT70V9269 IDT70V9269L IDT70V9269S
Contextual Info: HIGH-SPEED 3.3V 16K x 16 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM Features: ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed clock to data access – Commercial: 9/12/15ns max.