680PS Search Results

PS5570

Abstract: MAX3803 MAX3803UBP-T
Contextual Info: 19-2699; Rev 0; 2/03 DC-Coupled, UCSP 3.125Gbps Equalizer Features ♦ DC-Coupled Input and Output to Terminations as Low as +1.1V ♦ 2mm x 2.5mm UCSPTM ♦ 1Gbps to 3.2Gbps Operating Range ♦ Spans 40in 1m of FR4 ♦ Spans 10m, 28AWG Twin Ax ♦ Receive Equalization to Reduce ISI

ICS853S12I

Abstract: 853S12AKILFT ICS853S12AKI MO-220 Heat Trace
Contextual Info: ICS853S12I LOW SKEW, 1-TO-12, DIFFERENTIAL-TO3.3V, 2.5V LVPECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS853S12I is a low skew, 1-to-12 DifferentialICS to-3.3V, 2.5V LVPECL Fanout Buffer and a member HiPerClockS of the HiPerClockS™ family of High Performance

PCF2111

Contextual Info: PCF2111 LCD Duplex Driver Signetics Product Specification Linear Products DESCRIPTION FEATURES The PCF2111 is a single-chip, silicongate CMOS circuit designed to drive an LCD Liquid Crystal Display with up to 64 segments in a duplex manner: espe­ cially for low-voltage applications. A

K284

Abstract: d143 crystal ECL 100111 11010 ANM050 CY7B923 TSS323 hamming encoder decoder
Contextual Info: ANM050 Take the Advantage with HSDLink TSS923/933 1. Introduction A natural way to exchange data between systems is the serial link. Systems become more and more powerful asking a very high speed link. HSDLink provides a simple and low–cost solution to high speed data transmission.

Contextual Info: Frequently Asked Questions on 200 Mbps PHYs IDT77V1264 IDT77V126 By Rakesh Bhatia Notes Revision History September 17, 2001: Initial publication. Q. The Good Signal bit in the Interrupt Status Register does not assert when I first establish a serial connection with another ATM25 device.

cxd1130

Abstract: YM3815 cxd1125 CX23035 SM5806 CXD1135 mn6617
Contextual Info: MITSUBISHI SOUND PROCESSORS M51565P DUAL ANALOG AUDIO OUTPUT AMPLIFIER FOR DIGITAL AUDIO DESCRIPTION The M51565P ia a semiconductor integrated circuit for use PIN CONFIGURATION TOP VIEW as an analog output amplifier in combination with the Digitalto-Analog convertor (PCM54/56 product by Burr-Brown or

ICS853111

Abstract: ICS853111-02
Contextual Info: Integrated Circuit Systems, Inc. ICS853111-02 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS853111-02 is a low skew, high performance 1 - t o - 10 Differential-to-2.5V/3.3V HiPerClockS LVPECL/ECL Fanout Buffer and a member

transformer "fibre channel"

Abstract: 11010 ANM050 CY7B923 40MHz Crystal d40 d143 crystal hamming encoder decoder D112 quartz crystal
Contextual Info: ANM050 Take the Advantage with HDSLink TSS923/933 Introduction A natural way to exchange data between systems is the serial link. Systems become more and more powerful asking a very high speed link. HDSLink provides a simple and low-cost solution to high speed

laser chirp parameter

Abstract: cyoptics CYOPTICS laser LIM400 AC Photonics, modulator JESD625-A laser transmitter 10ghz GR-468-CORE DFB laser drivers GPPO
Contextual Info: Datasheet LIM400 40Gb/s Transmitter Product Overview Features • • • • • • • • • Enables ITU and MSA Compliance Single Fiber Package 40Gb Electroabsorption Modulator EAM with Integrated Laser Integrated bias eliminates need for external bias-tee

Contextual Info: Integrated Circuit Systems, Inc. ICS853111-02 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS853111-02 is a low skew, high performance 1 - t o - 10 Differential-to-2.5V/3.3V HiPerClockS LVPECL/ECL Fanout Buffer and a member

ICS853111

Abstract: ICS853111-02
Contextual Info: DATA SHEET ICS853111-02 ICS853111-02 Integrated DIFFERENTIAL-TO-2.5V/3.3V LOW SKEW, 1-TO-10 Circuit Systems, Inc. BUFFER LVPECL/ECL FANOUT LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER GENERAL DESCRIPTION FEATURES The ICS853111-02 is a low skew, high performance 1 - t o - 10 Differential-to-2.5V/3.3V

DIMM DDR400 PC3200

Abstract: DDR200 DDR266 PC2100 PC2700 PC3200 PC4300 PI74SSTVF16857
Contextual Info: #44 PI74SSTVF16857 for DDR Applications By Jimmy Ma Introduction DDR is short form for Double Data Rate, a new generation of memory technology that has evolved from its predecessor, the single data rate PC100/PC133. This technology of acquiring data on the rising and falling edge has enabled memory modules, or DIMM’s,

UTP5

Abstract: osc 10M ST6200T 256Mb RG174 cable 1100E IDT77V1264L200 hyperlynx stripline pcb k line driver application note
Contextual Info: Transmission Distance and Jitter Guide Notes IDT77V1264L200 Application Note AN-330 Revision History September 27, 2001: Initial publication. Cable Length Guide for the 77V1264L200 Overview The purpose of this document is to demonstrate the signal quality of TX and RX signals over 10m of

PS5570

Abstract: MAX3803 MAX3803UBP-T
Contextual Info: 19-2699; Rev 1; 6/04 DC-Coupled, UCSP 3.125Gbps Equalizer The MAX3803 equalizer automatically provides compensation for transmission-medium losses encountered with FR4 stripline and cable in an incredibly small 2mm x 2.5mm package. It is ideal for backplane applications

ALVCH16244

Contextual Info: Application Note 6