67C4023 Search Results

67C402

Abstract: IR 2153 67C401-10
Contextual Info: 67C401/13, 67C402/23 Advanced Micro Devices Low Density First-In First-Out FIFO 64 x 4, 64 x 5 CMOS Memory (Cascadable) DISTINCTIVE CHARACTERISTICS RAM-based architecture for short fall-through delay • Zero standby power ■ High-speed 15 MHz shift-in/shlfi-out rates

Contextual Info: First-In First-Out FIFO 6 4 x 4 ,6 4 x 5 Memory 1 0 / 1 5 MHz (Cascadable) CMOS 67C401 /1 3 6 7 C 4 0 2 /2 3 Ordering Information Features '• • Zero standby power PART NUMBER PKG • Very low active power consumption 67C401-10 N,J Com Totem Pole 10 MHz 64x4

67C4023

Contextual Info: First-In First-Out FIFO 64x4, 64x5 Memory 1 0 /15 MHz (Cascadable) CMOS Features 67C401/13 67C402/23 Ordering Information • Zero standby power • High-speed 15-MHz shift-in/shift-out rates PART NUMBER PKG 67C401-10 67C401-15 TEMP OUTPUT DESCRIPTION N,J,NL

67c401

Abstract: 67C4023 67C402 67C4023-15 67C402-10 67C401-10 67C4013 67C4023-10
Contextual Info: a 67C401/13, 67C402/23 Advanced Micro Devices Low Density First-In First-Out FIFO 64 x 4, 64 x 5 CMOS Memory (Cascadable) DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ RAM-based architecture for short fall-through delay Full CMOS cell for maximum noise Immunity

wf vqc 10d

Abstract: TGS 2201 SMD W2T TRANSISTOR SMD W2T 72 EX5962 MMI PAL14L8 C57401j tms 6011 MIMI Ti PROM programming procedure w2t smd
Contextual Info: 2 Specialty Memory Products 1988 Data Book Advanced Micro Devices Monolithic ryisn Memories UliTlU A W h o lly O w n e d S u b s id ia ry o f A d v a n c e d M ic r o D e vice s a Advanced Micro Devices Sp ecialty Memory Products Data Book/Handbook Introduction

67C402

Abstract: 64X4 67C4023
Contextual Info: 67C401/13 a 67C402/23 Advanced Micro Devices First-In First-Out FIFO 64x4, 64x5 Memory 10/15 MHz (Cascadable) CMOS Features Ordering Information • Zero tta n d b y power • High-speed 15-MHz shlft-in/shlft-ou t rales Part Num ber Package Temp O utput

Contextual Info: a 67C401/13, 67C402/23 Advanced Micro Devices Low Density First-In First-Out FIFO 64 x 4,64 x 5 CMOS Memory (Cascadable) DISTINCTIVE CHARACTERISTICS RAM-based architecture for short fall-through delay • Zero standby power ■ High-speed 15 MHz shift-ln/shift-out rates