64X4 Search Results

Contextual Info: SN74ALS236 64x4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107C - OCTOBER 1986 - REVISED APRIL 1998 DW OR N PACKAGE TOP VIEW • Asynchronous Operation • Organized as 64 Words by 4 Bits • Data Rates up to 30 MHz • 3-State Outputs • Package Options Include Plastic

Contextual Info: First-In First-Out FIFO 64x4 64x5 Memory 15 MHz (Cascadable) C67L401D C67L402D Ordering Inform ation Features/ Benefits • High-speed 15-MHz shift-in/shift-oul rates • Low power consumption PART NUMBER PKG TEMP DESCRIPTION • Choice of 4-bit or 5-bit data width

Contextual Info: C67401 C67401A C67402 C67402A Advanced Micro Devices First-In First-Out FIFO 64x4, 64x5 Cascadable Memory DISTINCTIVE CHARACTERISTICS ORDERING INFORMATION • Choice of 15 and 10 MHz shift-out/shlfl-in rates • Choice of 4-bit or 5-blt data width • TTL inputs and outputs

C57401

Contextual Info: C57401 C57401A C57402 C57402A 57401 57401A 57402 57402A Military Standard FIFOs 64x4 64x5 Cascadable & Standalone Memory £1 Advanced Micro Devices DISTINCTIVE CHARACTERISTICS Structured pinouts. Output pins directly oppo­ site corresponding Inputs pins • Choice of 7 or 10 MHz shlft-out/shift-ln rates

Contextual Info: CAT22C1 Ol CAT22C101 - Industrial Temperature 256-BIT 64x4 NONVOLATILE CMOS STATIC RAM DESCRIPTION FEATURES The Catalyst CAT22C101 Nonvolatile Random Ac­ cess Memory (NVRAM) is a 256-bit device with a 64x4 organization. It features fully static CMOS cir­

67C402

Contextual Info: a 67C401/13 67C402/23 First-In First-Out FIFO 64x4, 64x5 CMOS MEMORY Advanced Micro Devices 25/35 MHZ (Cascadable) FEATURES ORDERING INFORMATION 67 C 401 - 35 N • Zero standby power • High-tpeed 35-MHz shlft-ln/shlft-out rate* OPERATING — _ CONDITIONS

67c401

Abstract: MMI 67401 67c402 MMI+67401
Contextual Info: SiliconJusfaris SSI 6 7 C 4 0 1 /4 0 2 First-In First-Out FIFO 64x4 or 64x5 Memory INNOVATORS IN/INTEGRATION Preliminary Data Sheet GENERAL DESCRIPTION FEATURES The SSI 67C401/402 devices are high speed, expandable memories operating as a First-In, First-Out, (FIFO)

Contextual Info: Xicor X22C10 256 Bit X22C10 64x4 Nonvolatile Static RAM FEATURES DESCRIPTION * High Performance CMOS —120ns RAM Access Time • High Reliability —Store Cycles: 1,000,000 — Data Retention: 100 Years • Low Power Consumption —Active: 40mA Max. —Standby: 100|iA Max.

Contextual Info: First-In First-Out FIFO 6 4 x 4 ,6 4 x 5 Memory 1 0 / 1 5 MHz (Cascadable) CMOS 67C401 /1 3 6 7 C 4 0 2 /2 3 Ordering Information Features '• • Zero standby power PART NUMBER PKG • Very low active power consumption 67C401-10 N,J Com Totem Pole 10 MHz 64x4

Contextual Info: First-In First-Out FIFO 64x4 64x5 Memory 67411A 67412A 35 MHz (Standalone) Features/ Benefits Ordering Inform ation • High-speed 35-MHz shift-ln/shitt-out rales PART NUMBER • Choice of 4-bit or 5-blt data width • TTL inputs and outputs • Readily expandable in word width

67C4023

Contextual Info: First-In First-Out FIFO 64x4, 64x5 Memory 1 0 /15 MHz (Cascadable) CMOS Features 67C401/13 67C402/23 Ordering Information • Zero standby power • High-speed 15-MHz shift-in/shift-out rates PART NUMBER PKG 67C401-10 67C401-15 TEMP OUTPUT DESCRIPTION N,J,NL

Contextual Info: C57401 C57401A C57402 C57402A 57401 57401A 57402 57402A Military Standard FIFOs 64x4 64x5 Cascadable & Standalone Memory 71 Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Choice of 7 or 10 MHz shift-out/shlft-ln rates • Choice of standalone or cascadable devices

27080

Abstract: SNC500 128X4 TRANSISTORS BJT list SNC510 SNC520 SNC532 SNC542 SNC552 SNC562
Contextual Info: SNC500 E.V. Board Direct Drive Speech Controller 2-Channel Direct Drive Speech Controller „ OVERVIEW Figure-1 „ CHIPS EMULATED SNC500 Series: Chips Voice Channel RAM ROM Duration number Size Size IO SNC510 7 sec 1 64x4 24Kx10 8: 8 IO (P2, P3) SNC520 10 sec

LIFO

Abstract: 3341A 64x4 ttl FIFO 4703B 4706B F464-2 F464-3 F464-4 Shift Register"
Contextual Info: FAIRCHILD MEMORY SERIAL MEMORY Logic/Connection Diagram 3348 Static Shift Register 1.0 150 C 24 M36 7M 2 32x6 3349 Static S hift Register 1.0 150 C 16 M37 6Z,8K,9B 3 64x4 3341 FIFO 0.7 450/625'» C,L,M 16 M38 6Z,8K 4 64x4 3341A FIFO 1.0 450 C 16 M38 62,8K

C67L401D

Abstract: C67L402D L401D
Contextual Info: First-In First-Out FIFO 64x4 6 4x5 Memory 15 MHz (Cascadable) C 6 7 L4 0 1 D C 6 7 L4 0 2 D Ordering Inform ation Features/ Benefits • High-speed 15-MHz shift-in/shift-out rates PART NUMBER PKG TEMP DESCRIPTION • Choice of 4-bit or 5-bit data width ; C67L401D

fairchild 9407

Abstract: fairchild 9423 ci 9410 4703B 4706B F464-2 F464-3 F464-4 16x4-Bit 16x4 fifo
Contextual Info: FAIRCHILD MEMORY SERIAL MEMORY Logic/Connection Diagram 3348 Static Shift Register 1.0 150 C 24 M36 7M 2 32x6 3349 Static S hift Register 1.0 150 C 16 M37 6Z,8K,9B 3 64x4 3341 FIFO 0.7 450/625'» C,L,M 16 M38 6Z,8K 4 64x4 3341A FIFO 1.0 450 C 16 M38 62,8K

LIFO

Abstract: 64x4 4703B 4706B F464-2 F464-3 F464-4 shift register ttl 33511
Contextual Info: FAIRCHILD MEMORY SERIAL MEMORY 1.0 150 C 24 M36 7M 2 32x6 3349 Static Shift Register 1.0 150 C 16 M37 6Z,8K,9B 3 64x4 3341 FIFO 0.7 450/625'» C,L,M 16 M38 6Z,8K 4 64x4 3341A FIFO 1.0 450 C 16 M38 62,8K 5 64x4 3342 Static Shift Register 1.5 380 C 16 M35 6Z.8K.9B

Contextual Info: ADV MICRO IME MEMORY 57C401/13 57C402/23 D I □2S7S5Û ooa?ast. g 57C4033 I a dvanced Micro Devices Military CMOS Zero Power FIFOs 64x4 64x5 Memory 12 MHz Cascadable Conforms to MIL-STD-883, Class B (Latest Revision) DISTINCTIVE CHARACTERISTICS • Zero standby power

Contextual Info: X22C10 256 Bit « X22C10 64x4 Nonvolatile Static RAM FEATURES DESCRIPTION * High Performance CMOS — 120ns RAM Access Time * High Reliability — Store Cycles: 1,000,000 — Data Retention: 100 Years * Low Power Consumption —Active: 40mA Max. — Standby: 100pA Max.

Contextual Info: Xicnp Advance Information X22C10 256 Bit 64x4 Nonvolatile Static RAM FEATURES DESCRIPTION * High Performance CMOS —120 ns RAM Access Time • High Reliability —Store Cycles: 1,000,000 —Data Retention: 100 Years * Low Power Consumption —Active: 40 mA Max.

78Z3

Contextual Info: 256 Bit X22C10 64x4 Nonvolatile Static RAM FEATURES DESCRIPTION • High Performance CMOS — 120ns RAM Access Time • High Reliability — Store Cycles: 1,000,000 — Data Retention: 100 Years • Low Power Consumption — Active: 40mA Max. — Standby: 100|iA Max.

F3341

Contextual Info: First-In First-Out FIFO 64x4 64x5 Memory £7</-u pt 6 » 67411A 67412A 3 5 MHz (Standalone) F e atu res / Benefits Ordering Inform ation • High-speed 35-MHz shilt-in/shift-out rates • Choice of 4-bit or 5-bit data width • TTL inputs and outputs • Readily expandable in word width

4702B

Abstract: 4703B 4704B 4705B 4706B 4707B 4708B 4710B F464-2 F464-3
Contextual Info: FAIRCHILD MEMORY SERIAL MEMORY Logic/Connection Diagram 3348 Static Shift Register 1.0 150 C 24 M36 7M 2 32x6 3349 Static S hift Register 1.0 150 C 16 M37 6Z,8K,9B 3 64x4 3341 FIFO 0.7 450/625'» C,L,M 16 M38 6Z,8K 4 64x4 3341A FIFO 1.0 450 C 16 M38 62,8K

16x4-Bit

Abstract: 4702B 4703B 4704B 4705B 4706B 4707B 4708B 4710B F464-2
Contextual Info: FAIRCHILD MEMORY SERIAL MEMORY Logic/Connection Diagram 3348 Static Shift Register 1.0 150 C 24 M36 7M 2 32x6 3349 Static S hift Register 1.0 150 C 16 M37 6Z,8K,9B 3 64x4 3341 FIFO 0.7 450/625'» C,L,M 16 M38 6Z,8K 4 64x4 3341A FIFO 1.0 450 C 16 M38 62,8K