67L401 Search Results

1N3064

Abstract: 1N916 C67L4013D
Contextual Info: C 67L4013D First-In First-O ut FIFO 6 4 x 4 Memory 15 MHz (Cascadable) W ith Three-S tate Outputs Ordering Inform ation F eatu res/ Benefits I • High-speed 15-MHz shift-in/shlft-out rates • Low power consumption • TTL inputs and outputs PART NUMBER

F3341

Abstract: xxnx 67L401
Contextual Info: Low Power First-In First-O ut FIFO 6 4 x 4 Memory 67L401 O rdering Inform ation Features/B enefits • Guaranteed 5 MHz shi(t-out/shift-ln rates PART NUMBER • Low Power Consumption • TTL inputs and outputs • Readily expandable In the bit dimensions

C6714

Contextual Info: C6714 0 l£> C 67L401D C 67L402D First-In First-O ut FIFO 6 4 x 4 6 4 x 5 Mem ory 15 MHz (Cascadabie) 067 i.n<p2.s> Ordering Information Features/ Benefits • High-speed 15-MHz shitt-in/shift-out rates • Low power consumption PART NUMBER PKG TEMP • Choice of 4-bit or 5-bit data width

57401 "pin compatible"

Contextual Info: Low Powor First-In First-Out FIFO 6 4 x 4 Cascadable Memory 67L401 Features/Benefits • Guaranteed 5 MHz shift-out/shift-in rates • Low Power Consumption Ordering Information PART NUMBER PKG TEMP 67L401 N COM 5 MHz 64x4 FIFO 67L401 J COM 5 MHz 64x4 FIFO

Contextual Info: First-In First-Out FIFO 64x4 Memory 15 MHz (Cascadable) With Three-State Outputs Features/ Benefits • High-speed 15-MHz shitt-in/shift-out rates C 67L4013D Ordering Inform ation • Low power consumption PART NUMBER PKG TEMP 0/P DESCRIPTIO N • TTL inpub and outputs

F3341

Abstract: 67L401 64X4 64x4 memory ir receiver through shift register
Contextual Info: Low P o w er F irs t-In F irs t-O u t F IF O 6 4 x 4 M em o ry ,• _ . 7 ^ °f 67L401 F eatu res/B en efits O rdering Inform ation • Guaranteed 5 MHz shift-out/shift-in rates PART NUMBER • Low Power Consumption • TTL inputs and outputs • Readily expandable in the bit dimensions

Contextual Info: Low Power First-In First-Out FIFO 6 4 x5 Memory 67L402 Ordering Inform ation Features/B enefits • Guaranteed 5 MHz shitt-out/shlft-ln rates • Low power consumption PART PACKAGE • TTL input* and output* 67L402 N, NL 67L402 j . • Readily expandable in the bit dimensions

coin slot

Abstract: "magnetic tape"
Contextual Info: Advanced Micro Devices AN-149 First-In First-Out Memories: Operations and Applications Zwie Amitai and Nusra Lodhi In many digital systems, high-speed transfers of data or instruc­ tions take place between sources and destinations that have different data rates. In other cases, the source and destination

Contextual Info: Low Power First-In First-O ut FIFO 6 4 x 4 Mem ory , , 6 7 L 4 0 1 *> 7 4 o f Features/Benefits Ordering Information • Guaranteed 5 MHz shift-out/shift-in rates PART NUMBER • Low Power Consumption • TTL inputs and outputs • Readily expandable in the bit dimensions

wf vqc 10d

Abstract: TGS 2201 SMD W2T TRANSISTOR SMD W2T 72 EX5962 MMI PAL14L8 C57401j tms 6011 MIMI Ti PROM programming procedure w2t smd
Contextual Info: 2 Specialty Memory Products 1988 Data Book Advanced Micro Devices Monolithic ryisn Memories UliTlU A W h o lly O w n e d S u b s id ia ry o f A d v a n c e d M ic r o D e vice s a Advanced Micro Devices Sp ecialty Memory Products Data Book/Handbook Introduction

64x4 memory

Abstract: 1N3064 C67L4013D IR 8115
Contextual Info: First-In First-Out FIFO 64x4 Memory 15 MHz (Cascadable) With Three-State Outputs Features/ Benefits • High-speed 15-MHz shift-in/shlft-out rates C 67L 4013D Orderinf1 Information • Low power consumption PART NUMBER PKG TEMP O/P DESCRIPTION • TTL inputs and outputs

Contextual Info: Low Power First-In First-Out FIFO 64x4 Memory 67L4 0 1 Features/Benefits Ordering Information • Guaranteed S MHz shift-out/shift-in rates PART NUM BER • Low Power Consumption • TTL inputs and outputs • Readily expandable In the bit dimensions • Structured pinouts. Output pins directly opposite corres­

triac tag 8518

Abstract: 70146 DS3654 X2864AD 7 segment display RL S5220 TC9160 la 4440 amplifier circuit diagram 300 watt philips ecg master replacement guide vtl 3829 A-C4 TCA965 equivalent
Contextual Info: 1985 0 / 0 / CONTENTS VOLUME I Introduction to IC MASTER 3 Advertisers’ Index 8 Master Selection Guide Function Index I0 Part Number Index 40 Part Number Guide 300 Logo Guide 346 Application Note Directory 349 Military Parts Directory 50I Testing 506 Cross Reference

Contextual Info: First-In First-Out FIFO 64x4 Memory 15 MHz (Cascadable) With Three-State Outputs C 6 7 L 4 0 1 3D Ordering Information Features/ Benefits • High-speed 15-MHz shift-in/shlft-out rates PART I NUMBER I - • Low power consumption • TTL inputs and outputs

Contextual Info: Low Power First-In First-Out FIFO 64x5 Memory 6 7 L4 0 2 Features/Benefits Ordering Information • Guaranteed 5 MHz shift-out/shlft-ln rates • Low power consumption • TTL Input* and outputs • Readily expandable In the bit dimensions • Structured pinouts. Output pins directly opposite corres­