54SX0 Search Results

actel fpga 54sx32

Abstract: 54SX32 54SX16 54SX08 066V 54SX RT54SX
Contextual Info: Application Note Power-Up and Power-Down Behavior of 54SX and RT54SX Devices I n tro du ct i on One of the key benefits of Actel’s nonvolatile antifuse FPGA technology is the ability of the devices to be live at power-up. Since no configuration PROMs are required to

54sx08

Abstract: THERMAL Fuse m20 tf 115 c
Contextual Info: v 3 .0 54SX Family FPGAs Leading Edge Performance • 100%Resource Utilization with 100%Pin Locking • 320 MHz Internal Performance • 3.3VOperation with 5.0VInput Tolerance • 3.7 nsClock-to-Out Pi n-to-Pi n • Very Low Power Consumption • 0.1 ns Input Set-Up

Contextual Info: 54SXFamily FPGAs Leadi ng Edge P e r f o r m a nc e • • 320 MHz Internal Performance • 3.3VOperation with 5.0YInput Tolerance • 3.7 ns Qock-to-Out Pin-to-Pin • • 0.1ns Input Set-Up • Deterministic, Ufcer-Controllable Timing • 0.25 ns d o c k Skew

actel fpga 54sx32

Abstract: 24v to 5v level shifter TTL to LVTTL level shifter 54SX16P
Contextual Info: Application Note Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs I n tro du ct i on In the past, bipolar circuits with a 5V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

actel fpga 54sx32

Abstract: 54SX32 54SX RT54SX antifuse fpga
Contextual Info: Application Note AC145 Power-Up and Power-Down Behavior of 54SX and RT54SX Devices I n tro du ct i on One of the key benefits of Actel’s nonvolatile antifuse FPGA technology is the ability of the devices to be live at power-up. Since no configuration PROMs are required to

54SX32

Abstract: AC146 actel fpga 54sx32 SX FPGAs TTL to LVTTL level shifter RT54SX 54SX16 54sx08
Contextual Info: Application Note AC146 Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs I n tro du ct i on In the past, bipolar circuits with a 5V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

THERMAL Fuse m20 tf 115 c

Abstract: 54SX16A actel fpga 54sx32 54SX32
Contextual Info: ^ c te l v 2 .0 54SX Family FPGAs L ea d in g Edge Pe rform an ce • 100% Resource Utilization with 100%Pin Locking • 320 MHz Internal Performance • 3.3V Operation with 5.0V Input Tolerance • 3.7 ns Clock-to-Out Pm-to-Pin • Very Low Power Consumption

TTL to LVTTL level shifter

Abstract: 54SX32 54SX16 54SX16P 54SX08 3.3v to 5v logic level shifter actel fpga 54sx32
Contextual Info: Appl i cat i o n Br i ef Two-Way Mixed-Voltage Interfacing of Actel’s SX FPGAs Introduction In the past, bipolar circuits with a 5.0V standard power supply voltage dominated digital system designs. CMOS IC manufacturers adopted this power supply voltage, and most

54SX08A

Abstract: 3A03D BC600-3 "network interface cards"
Contextual Info: Application Note Using External SRAM Memory with Actel SX/SX-A FPGAs I n tro du ct i on Today’s system designs are growing in complexity, requiring larger amounts of memory for high-performance buffers and other local data storage. System designs that require both

sx08a

Abstract: ATQ100 SX32a RTSX16
Contextual Info: A p p l i c a t i on N o t e SX to SX-A Design Migration In t ro d u c t i o n • Configurable Output State During Power-Up: All outputs can be programmed to either weak resistor pull-up or weak resistor pull-down for output tri-state. Actel’s newest line of antifuse FPGAs, SX-A, is fabricated

54SX16A

Abstract: 54sx32 54SX0 54SX08A Signal Path Designer 54SX32A
Contextual Info: Designer Series Development System R1-2000 Release Notes This document describes the new features and enhancements of the Designer Series Development System R1-2000 release. It also contains information about discontinued features and known limitations. Supported Platforms

BC652-3

Abstract: 54SX32A 54SX32 A54SX72A-PQ208 A54SX08A A54SX72A AC150 EP20K400 EPF10K200E PQ208
Contextual Info: Application Note AC150 Using External SRAM Memory with Actel SX/SX-A FPGAs I n tro du ct i on Today’s system designs are growing in complexity, requiring larger amounts of memory for high-performance buffers and other local data storage. System designs that require both

54SX08A

Abstract: mt48 54sx08 CS1N SDRAM Controller
Contextual Info: v2.0 General-Purpose SDRAM Controller SD R A M Co n t r o l l er Fu nc t i o na l D es cr i p t i o n CLK RESET_N ACTIVATE WR_CYC ADDR CYC_DONE The general-purpose SDRAM controller is designed to provide simplified control of many different sizes of SDRAMs. The controller architecture provides control for