54LS4 Search Results

54LS466

Abstract: 74LS467 74LS465 74LS468 74ls46 81LS98 74ls466
Contextual Info: 54LS465 THRU 54LS468, SN74LS465 THRU SN74LS468 OC TAL BU FFERS W ITH 3 S T A T E OUTPUTS D 2 6 3 1 , JA N U A R Y 1981 - SN 54LS465 AND SN 54LS466 . . . J PACKAGE SN 74LS465 AND SN 74LS466 . . . DW OR N PACKAGE TOP VIEW! G1 A1 • 3-State Outputs Rated at lo L o f 12 m A and

counter 74490

Abstract: of 74ls90 IC decade counter
Contextual Info: TYPES SN54490, 54LS490, SN74490, SN74LS490 DUAL 4-BIT DECADE COUNTERS O CTO BER Dual Versions of Popular SN 5490A, SN 54LS90, SN 7490A, and SN 74LS90 Counters 1 9 7 6 —R E V IS E D D ECEM BER 1983 SN 54490, SN 54LS490 . . . JO R W PACKAG E SN 74490 I OR N PACKAG E

54LS423

Abstract: 74LS422 SM74LS42 54LS422
Contextual Info: 54LS422, 54LS423, SN74LS422, SN74LS423 RETRIGGERABLE MONOSTABLE MULTIVIBRATORS D2536, JANUARY 1980 - REVISED MARCH 1988 Will Not Trigger from Clear SN 54LS422 . . J OR W PACKAGE SN 74LS422 . . . D OR N PACKAGE D-C Triggered from Active-High or ActiveLow Gated Logic Inputs

Contextual Info: & June 1989 54LS42/54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect­ ed in pairs to make BCD input data available for decoding

SN54LS440

Abstract: SN54LS442 SN54LS444 SN74LS440 SN74LS442 SN74LS444
Contextual Info: SN 54LS440 THRU S N 54LS 442, 54LS444 SN74LS440 THRU S N 74LS 442, SN 74LS444 QUADRUPLE TRIDIRECTIONAL BUS TRANSCEIVERS SDLS176 • 3 -W a y A s y n c h ro n o u s C o m m u n ic a tio n □ 2 4 2 5 , A U G U S T 1 9 7 9 -R E V IS E D M AR C H 1 9 8 8 S N 54L S ' . . . J PACKAGE

7 segment 14-pin

Abstract: BCD 8421 10204 BCD 8421 application 54LS 54LS49 54LS49DMQB 54LS49FMQB C1995 J14A
Contextual Info: 54LS49 BCD to 7-Segment Decoder General Description The 54LS49 translates four lines of BCD 8421 input data into the 7-segment numeral code as shown in the Function Table It has open-collector outputs and is logically the 14pin verson of the ’48 without the lamp test and ripple blanking features Also see the ’LS249 data sheet

Contextual Info: LS42 National Semiconductor 54LS42/54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect­ ed in pairs to make BCD input data available for decoding

LS48

Abstract: DM74LS46 7segment
Contextual Info: National Semiconductor 54LS48/DM74LS48 BCD to 7-Segment Decoder General Description The 'LS48 translates four lines of BCD 8421 input data into the 7-segment numeral code and provides seven corre­ sponding outputs having pull-up resistors, as opposed to

Contextual Info: LS49 National Jüt Semiconductor 54LS49 BCD to 7-Segment Decoder General Description The 54LS49 translates four lines of BCD 8421 Input data into the 7-segment numeral code as shown in the Function Table. It has open-collector outputs and is logically the 14pin verson of the ’48, without the lamp test and ripple blank­

Contextual Info: 54LS446, 54LS449, SN74LS446, SN74LS449 QUADRUPLE BUS TRANSCEIVERS WITH INDIVIDUAL DIRECTION CONTROLS D2613, OCTOBER 1 98 0-R EV ISED MARCH 1988 SN 54LS446. SN 54LS449 . . . J PACKAGE SN74LS446, SN74LS449 . . . D OR N PACKAGE 3-State O utputs D rive Bus Lin es D irectly

54LS42J

Abstract: cn7a
Contextual Info: SN5442A, 54LS42, S N 74 4 4 2 A , S N 74LS 42 4-LINE BCD TO 10-LINE DEC IM AL DECODERS M A R C H 1 9 7 4 - R E V IS E D M A R C H • • • All Outputs Are High for Invalid Input Conditions S N 5 44 2A , S N 54LS42 S N 7 4 4 2 A . . . N P AC K A G E SN 74LS42

54LS40DMQB

Abstract: DM74LS40N 54LS40FMQB 54LS40LMQB DM74LS40M E20A J14A M14A N14A
Contextual Info: NATIONAL SEMICOND i L O G I O 31E D • laSQUES GGbTTflS 3 T'IJ-iS-00 CTH National éüekSemiconductor 54LS40/DM74LS40 Dual 4-Input NAND Buffer General Description This device contains two independent gates each of which perform the logic NAND function. Connection Diagrams

LS247

Abstract: a2611 54LS 54LS447FMQB DM74LS447M DM74LS447N J16A M16A N16E W16A
Contextual Info: LS447 y n National Juâ Semiconductor 54LS447/DM74LS447 BCD to 7-Segment Decoder/Driver General Description The ’LS447 is the same as the ’LS247 except that the Out­ put OFF Voltage, Vqh ¡s specified as 7.0V rather than 15V, with the same Ioh limit of 250 /¿A. For all other information

ls47 MOTOROLA

Abstract: BL 12 SMD
Contextual Info: M M ilita ry 54L S 47 M O TO R O LA BCD To S even S egm ent D eco d er/D river W ith Open C o lle c to r O utputs MP0 ELECTRICALLY TESTED PER: MIL-M-38510/30704 m m The LSTTUMSI 54LS47 are Low Power Schottky BCD to 7-Segment Decoder/Drivers consisting of NAND gates, input buffers and seven

Contextual Info: LS42 ÉSA National ISemiconductor 54LS42/54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect­ ed in pairs to make BCD input data available for decoding

LS47

Abstract: rlbl
Contextual Info: National Juâ Semiconductor 54LS47/DM74LS47 BCD to 7-Segment Decoder/Driver General Description Features The ’LS47 accepts four lines of BCD 8421 input data, gen­ erates their complements internally and decodes the data with seven AND/OR gates having open-collector outputs to

54LS40DMQB

Contextual Info: National Semiconductor 54LS40/DM74LS40 Dual 4-Input NAND Buffer General Description This device contains two independent gates each of which perform the logic NAND function. Connection Diagrams Dual-ln-Llne Package T L /F /1 0 1 7 1 -1 Order Number 54LS40DMQB, 54LS40FMQB, S4LS40LMQB, DM74LS40M or DM74LS40N

DM74SL47

Abstract: LS47
Contextual Info: NATIONAL SEMICOND -CLOGIO I LSD112E GDIati7ûô H B1E D 7 - 5 i - r t ' O £ £ ] National æ m Semiconductor 54LS47/DM74LS47 BCD to 7-Segment Decoder/Driver General Description Features The 'LS47 accepts four lines of BCD 8421 Input data, gen­ erates their complements internally and decodes the data

74ls491

Abstract: PAL16R4A SN54LS491A 74LS491A 74LS49 SN74LS491A LS491
Contextual Info: 10-Bit Counter S N 5 4 /7 4 L S 4 9 1 A 74-LC4A/ Ar Ordering Information Features/Benefits • C R T vertical and horizontal tim ing generation PART NUM BER TEM P PACKAGE D E S C R IP T IO N • 24-pin S K IN N Y D IP saves space SN 54LS491A M il JS,W ,L 28

Contextual Info: M MOTOROLA. Military 54LS40 Dual 4-Input Positive N AND Buffer MPO ELECTRICALLY TESTED PER: MIL-M-38510/30201 mini LOGIC DIAGRAM VCC 02 C2 NC B2 AVAILABLE AS: A2 Y2 1) JAN: JM38510/30201BXA 2) SMD: N/A 3)883: 54LS40/BXAJC X = C A S E OUTLINE A S FOLLOWS:

Contextual Info: M MOTOROLA M ilitary 54LS42 B C D T o D e c im a l D e co d e r ELECTRICALLY TESTED PER: MIL-M-38510/30703 The LSTTL'M SI 54LS42 is a M u ltip u rp o s e D ecoder desig n ed to accept fo u r BCD in p u ts and p ro vid e ten m u tu a lly e xclu sive o u tp u ts. The LS42

LS247

Abstract: LS447
Contextual Info: LS447 i/W \ National J l â Semiconductor 54LS447/DM74LS447 BCD to 7-Segment Decoder/Driver General Description The ’LS447 is the same as the ’LS247 except that the Out­ put OFF Voltage, Voh is specified as 7.0V rather than 15V, with the same Ioh limit of 250 jxA. For all other information

Contextual Info: M MOTOROLA Military 54LS40 Dual 4-Input Positive NAND Buffer MPO ELECTRICALLY TESTED PER: MIL-M-38510/30201 mini LOGIC DIAGRAM Vq c D2 C2 NC B2 AVAILABLE AS: A2 Y2 1} JAN: JM38510/30201BXA 2) SMD: N/A 3)883: 54LS40/BXAJC X = CASE OUTLINE AS FOLLOWS: PACKAGE: CERDIP: C

Contextual Info: LS42 ZWÄNational éLm Semiconductor 54LS42/54LS42/DM74LS42 BCD/Decimal Decoders General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connect­ ed in pairs to make BCD input data available for decoding