54LS245FM Search Results

DM54LS245

Contextual Info: •M ICO N DUCTO R r DM74LS245 3-STATE Octal Bus Transceiver 3-STATE outputs drive bus lines directly General Description PNP inputs reduce DC loading on bus lines These octal bus transceivers are designed fo r asynchronous tw o-w ay com m unication between data buses. The control

dm74ls245n

Abstract: 54LS 54LS245 54LS245DMQB 54LS245FMQB 54LS245LMQB 74LS DM54LS245J DM54LS245W DM74LS245
Contextual Info: DM74LS245 3-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B

Fairchild 74LS

Abstract: DM74LS245 dm74ls245n 54LS 54LS245 54LS245DMQB 54LS245FMQB 54LS245LMQB 74LS DM54LS245J
Contextual Info: DM74LS245 3-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B

DM74LS245N

Abstract: LS245 74LS24 ab-10 national DM54LS245
Contextual Info: LS245 £ 3 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchro­ nous two-way communication between data buses. The control function implementation minimizes external timing

LS245

Abstract: DM54LS245
Contextual Info: LS245 National Semiconductor 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description PNP inputs reduce DC loading on bus lines Hysteresis at bus inputs improve noise margins Typical propagation delay times, port-to-port 8 ns Typical enable/disable times 17 ns

74LS245PC

Abstract: logic diagram of 74LS245 74LS245 pinout 74LS245 74LS TTL 245 LS245 74LS245p 75115 truth table NOT gate 74 54LS245DM
Contextual Info: 245 C O N N E C T IO N D IA G R A M P IN O U T A 54LS /74LS 245 ° I ^ ' D O C TA L BUS TRANSCEIVER W ith 3-State O utputs D E S C R IP T IO N — T h e 'LS245 is an o cta l bus tra n s m itte r/re c e iv e r de sig ne d fo r 8 -lin e a s y n c h ro n o u s 2 -w a y data c o m m u n ic a tio n betw een data busses.

598 6670

Abstract: 54LS 54LS245 54LS245DMQB 54LS245FMQB 54LS245LMQB 74LS DM54LS245J DM54LS245W DM74LS245
Contextual Info: E M IC D N D U C T O R t DM74LS245 3-STATE Octal Bus Transceiver General Description 3-STATE outputs drive bus lines directly PNP inputs reduce DC loading on bus lines These octal bus transceivers are designed for asynchronous tw o-w ay com m unication between data buses. Th e control

dm74ls245n

Abstract: 54LS245 DM54LS245 dm74ls245wm ls245 54LS 54LS245DMQB 54LS245FMQB 54LS245LMQB 74LS
Contextual Info: 54LS245 DM54LS245 DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way communication between data buses The control function implementation minimizes external timing requirements The device allows data transmission from the A bus to the B

54LS245

Abstract: 54LS 54LS245DMQB 54LS245FMQB 54LS245LMQB 74LS DM54LS245J DM54LS245W DM74LS245WM DM74LS245N
Contextual Info: June 1989 54LS245/DM54LS245/DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchro­ nous two-way communication between data buses. The control function implementation minimizes external timing

Contextual Info: 245 CONNECTION DIAGRAM PINOUT A l / 54LS/74LS245 OCTAL BUS TRANSCEIVER With 3-State Outputs DESCRIPTION— The 'LS245 is an octal bus transmitter/receiver designed for 8-line asynchronous 2-way data communication between data busses. Direction input (DR) controls transmission of data from bus A to bus B or bus