530PS Search Results

Contextual Info: Sony. CXB1102Q/Q-Y Quad Exclusive O R /N O R Gate Description Pin Assignment The C XB1102Q is an ultra high speed m onolithic ECL IC, which contains fo u r Exclusive OR/NOR gates. n nn n n n D 2b 18 0 2 a D IB 17 16 OU Ql 01 15 U 13 Features • Typical AC characteristics

Contextual Info: _ CXB1102Q SONY. Quad Exclusive O R/N O R Gate Description The CXB1102Q is an ultra high speed monolithic ECL IC, which contains four Exclusive OR/NOR gates. Features • Typical AC characteristics Pin Assignment « 170ps • Internal pull down resistors on input pins to main­

DS92LV16

Abstract: BLVDS AN-1217 DS92LV1023 DS92LV1224 TEKP6248 eye pattern
Contextual Info: National Semiconductor Application Note 1217 James Chang March 2002 The following application note contains information that will help you validate signal quality on a BLVDS SER/DES link. How to capture an eye pattern, how to generate an eye mask, and how to validate signal quality are all explained in

zo 103MA

Contextual Info: Differential-to-LVDS Buffer/Divider with Internal Termination IDT8S89872I DATA SHEET General Description Features The IDT8S89872I is a high speed Differential-to-LVDS Buffer/Divider with Internal Termination. The IDT8S89872I has a selectable ÷2, ÷4, ÷8, ÷16 output dividers. The clock input has internal termination

Contextual Info: SONY CORP/COMPONENT PROPS 5 OE A3flE?3fl3 0 0 0 3 0 3 5 D 0 «SONY CXB1102Q/Q-Y SO NY. T- H s-ùa Quad Exclusive OR/NOR Gate Description Pin Assignment The CXB1102Q is an ultra high speed monolithic ECL 1C, which contains four Exclusive OR/NOR gates. 02b 02a