512KX3 Search Results

K7Q161852A

Abstract: K7Q161852A-FC10 K7Q161852A-FC13 K7Q161852A-FC16 K7Q163652A K7Q163652A-FC10 K7Q163652A-FC13 K7Q163652A-FC16
Contextual Info: K7Q163652A K7Q161852A 512Kx36 & 1Mx18 QDRTM b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. April, 30, 2001 Advance 0.1 1. Amendment 1 Page 3,4 PIN NAME DESCRIPTION W 4A) : from Read Control Pin to Write Control

10D-11

Abstract: K7R160982B K7R160982B-FC16 K7R160982B-FC20 K7R161882B K7R161882B-FC16 K7R161882B-FC20 K7R163682B K7R163682B-FC16 K7R163682B-FC20
Contextual Info: K7R163682B K7R161882B K7R160982B 512Kx36 & 1Mx18 & 2Mx9 QDR TM II b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit, 2Mx9-bit QDRTM II b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Oct. 17, 2002 Advance 0.1 1. Change the Boundary scan exit order.

K7Q161864B-FC16

Abstract: D0-35 K7Q161864B K7Q163664B K7Q163664B-FC16
Contextual Info: K7Q163664B K7Q161864B 512Kx36 & 1Mx18 QDRTM b4 SRAM Document Title 512Kx36-bit, 1Mx18-bit QDRTM SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Jan. 27, 2004 Advance 1.0 1. Final spec release Mar. 18, 2004 Final Rev. No. The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the

K7N161801A

Abstract: K7N163601A
Contextual Info: K7N163601A K7N161801A 512Kx36 & 1Mx18 Pipelined NtRAM TM Document Title 512Kx36 & 1Mx18-Bit Pipelined NtRAMTM Revision History Rev. No. History Draft Date Initial document. Add JTAG Scan Order Add x32 org and industrial temperature . Add 165FBGA package Speed bin merge.

D0-35

Abstract: K7J161882B K7J161882B-FC16 K7J161882B-FC20 K7J161882B-FC25 K7J163682B K7J163682B-FC16 K7J163682B-FC20 K7J163682B-FC25
Contextual Info: K7J163682B K7J161882B 512Kx36 & 1Mx18 DDR II SIO b2 SRAM Document Title 512Kx36-bit, 1Mx18-bit DDR II SIO b2 SRAM Revision History History Draft Date Remark 0.0 1. Initial document. Dec. 16, 2002 Advance 0.1 1. Change the JTAG Block diagram Dec. 26, 2002 Preliminary

Memory

Abstract: FTS8L32512V
Contextual Info: FTS8L32512V 512Kx32 SRAM Module.3.3V FEATURES DESCRIPTION DSP Memory Solution The FTS8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions.

Contextual Info: K7A163608A K7A163208A K7A161808A PRELIMINARY 512Kx36/x32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature

KM4132G512Q

Abstract: BA 59 04A F P SM 11039 sgram
Contextual Info: SGRAM MODULE KM M 965G112Q P N / KMM966G112Q(P)N 8MB SGRAM MODULE (1 Mx64 SODIMM based on 512Kx32 SGRAM) Unbuffered SGRAM Graphics 64-bit Non-ECC/Parity 144-pin SODIMM Revision 2.1 March 1998 . i _ &prrranNre This Material Copyrighted By Its Respective Manufacturer

K7A161801M

Abstract: K7A163601M advh
Contextual Info: K7A163601M K7A161801M 512Kx36 & 1Mx18 Synchronous SRAM Document Title 512Kx36 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 Initial draft Jan. 18. 1999 Preliminary 0.1 1. Update ICC & ISB values. 2. Remove tCYC 117MHz -85

WS512K32-XXX

Contextual Info: WS512K32-XXX / EDI8C32512CA HI-RELIABILITY PRODUCT 512Kx32 SRAM MODULE, SMD 5962-94611 FEATURES • Access Times of 15*, 17, 20, 25, 35, 45, 55ns ■ 5 Volt Power Supply ■ Packaging ■ Low Power CMOS ■ Built-in Decoupling Caps and Multiple Ground Pins for Low

AM29F010

Contextual Info: EDI7C32128C 128Kx32 Flash 128Kx32 High Speed Flash Module Features The EDI7C32128C is a high speed, high performance, four megabit density Flash module, organized as 512Kx32 bits, containing four 128Kx8 die mounted in a package. Four Chip Enables are provided to independently enable

AM29LV004T

Abstract: EDI7F33512V
Contextual Info: EDI7F33512V 512Kx32 FLASH DESCRIPTION FIG. 1 The EDI7F33512, EDI7F233512 and EDI7F433512 are organized as 512Kx32 and 512Kx32 and 512Kx32 respectively. The modules are based on AMD's AM29LV004T - 512Kx8 Flash Device in TSOP packages which are mounted on an FR4 substrate.

WS1M32V-XG3X

Contextual Info: White Electronic Designs WS1M32V-XG3X PRELIMINARY* 1Mx32 SRAM 3.3V MODULE FEATURES Access Times of 17, 20, 25ns 3.3V Power Supply 84 lead, 28mm CQFP, Package 511 Low Power CMOS Organized as two banks of 512Kx32, User Configurable as 2Mx16 or 4Mx8 Built-in Decoupling Caps and Multiple Ground Pins

NC-2H

Abstract: K7B161825A K7B163225A K7B163625A
Contextual Info: K7B163625A K7B163225A K7B161825A Preliminary 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/x32 & 1Mx18-Bit Synchronous Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History 1. Initial draft 1. Add JTAG Scan Order 1. Add x32 org and industrial temperature .

K7A161801A

Abstract: K7A163201A K7A163601A
Contextual Info: K7A163601A K7A163201A K7A161801A PRELIMINARY 512Kx36/32 & 1Mx18 Synchronous SRAM Document Title 512Kx36/32 & 1Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. 0.0 0.1 0.2 History Draft Date Remark 1. Initial draft 1. Add x32 org and industrial temperature .

Contextual Info: K7I163684B K7I161884B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM 18Mb DDRII SRAM Specification 165FBGA with Pb & Pb-Free RoHS compliant INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: ^EDI EDI7C32512C _ ELECTRONIC DESIGNS, INC 512Kx32 Flash 512Kx32 High Speed Flash Module Features The EDI7C32512C is a high speed, high performance, sixteen megabit density Flash module, organized as 512Kx32 bits, containing four 512Kx8 die mounted in a package.

Contextual Info: ^EDI EDI8F32512C Electronic Designs Inc. High Speed Sixteen Megabit SRAM Module 512Kx32 Static RAM CMOS, High Speed Module Features The EDI8F32512C is a high speed 16 megabit Static RAM module organized as 512K words by 32 bits. This module is constructed from four 512Kx8 Static RAMs in

Contextual Info: WF512K32-XXX5 512Kx32 5V NOR FLASH MODULE SMD 5962-94612* FEATURES  Access Times of 60, 70, 90, 120, 150ns  Low Power CMOS  Packaging  Embedded Erase and Program Algorithms • 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP

Contextual Info: WED2DL32512V *PRELIMINARY 512Kx32 Synchronous Pipeline Burst SRAM FEATURES DESCRIPTION  Fast clock speed: 200, 166, 150 & 133MHz The WEDC SyncBurst - SRAM family employs high-speed, lowpower CMOS designs that are fabricated using an advanced CMOS process. WEDC’s 16Mb SyncBurst SRAMs integrate two

Contextual Info: a WPS4M 32-35MSC M/HITE /MICROELECTRONICS 4Mx32SRAM MODULE ADVANCED* FEATURES • ■ A ccess Tim e of 35ns ■ Packaging ■ B yte C ontrol Chip S elects Fully S ta tic O peration • No C lock or Refresh required • M o d u le is m a nufa cture d w ith eig h t 512Kx32 SRAM

Contextual Info: a WHITE /MICROELECTRONICS W PS512K32-XPJX 512Kx32 SRAM MODULE FEATURES • A c c e s s T i m e s o f 1 5 , 1 7 , 2 0, 2 5 n s ■ T TL C o m p a t i b l e In p u ts a n d C M O S O u tp u t s ■ P a c k a g in g ■ 5 V o l t P o w e r S u p p ly • 68 Lead, P la s tic PLCC, 2 5 . 1 5 m m 0 .9 9 0 inch sq u a re

Contextual Info: TT WHITE /MICROELECTRONICS 512Kx32 5V FLASH MODULE WPF512K32-XPJX5 PRELIMINARY* FEATURES • A cce ss Tim es of 60, 90ns C om m ercial and Industrial Te m p e ra tu re Ranges ■ Packaging 5 V o lt P rogram m ing. 5V + 10% Supply • 68 Lead, Plastic PLCC, 24.94 mm 0.982 inch square

Contextual Info: WS1M32V-XG3X PRELIMINARY* 1Mx32 SRAM 3.3V MODULE FEATURES  Access Times of 17, 20, 25ns  3.3V Power Supply  84 lead, 28mm CQFP, Package 511  Low Power CMOS  Organized as two banks of 512Kx32, User Configurable as 2Mx16 or 4Mx8