512MBIT Search Results

K4S511632D

Contextual Info: K4S511632D CMOS SDRAM DDP 512Mbit SDRAM 8M x 16bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 July. 2002 This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers,

Contextual Info: 512Mb x16, DDP DDR SDRAM DDP 512Mbit DDR SDRAM 8M x 16bit x 4 Banks DDR SDRAM Specification Revision 1.0 July. 2002 This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers,

MD4832-D512-V3Q18-X-P

Abstract: md4832d512v3q MD4811-D512-V3Q18-X dragonball mx1 Diskonchip QUALCOMM Reference manual AD12 AD14 PR31700 MD4331-d1G-V3Q18-X-P
Contextual Info: Mobile DiskOnChip G3 512Mbit/1Gbit Flash Disk with MLC NAND and M-Systems’ x2 Technology Preliminary Data Sheet, June 2003 Highlights Mobile DiskOnChip G3 is one of the industry’s most efficient storage solutions, using Toshiba’s 0.13 µm Multi-Level Cell MLC

OTB-400-1

Contextual Info: MEMORY MODULE SDRam 64Mx48-SOP 3DSD2G64VB4488 Synchronous Dynamic Ram MODULE 2Gbit SDRAM organized as 32Mx64, based on 32Mx16 Pin Assignment Top View BGA 119 (8x15 - Pitch : 1.27mm) Features - Stack of four 512Mbit SDRam. - Organized as 32Mx64bit. - Single +3.3V power supply.

Contextual Info: MEMORY MODULE SDRAM 32Mx64-BGA DATA SHEET SYNCHRONOUS DRAM MODULE 3DSD2G64VB4383 2-Gbit SDRAM organized as 32Mx64, based on 32Mx16 Features - Stack of four 512Mbit SDRAM. - Organized as 32Mx64bit. - High frequency: 133Mhz - Single +3.3V power supply. - Fully synchronous; all signals registered on

3DSD2G16VS4364

Abstract: 3D-PLUS
Contextual Info: MEMORY MODULE SDRAM 128Mx16-SOP 3D SD2G16VS4364 Synchronous Dynamic Ram MODULE 2Gbit SDRAM organized as 2128Mx16, based on 128Mx4 Pin Assignment Top View SOP 54 (Pitch : 0.80 mm) Features - Stack of four 512Mbit SDRam. - Organized as 128Mx16-bit. - Single +3.3 power supply.

k4h510838d

Contextual Info: 512Mb x16, DDP DDR SDRAM DDP 512Mbit SDRAM 32M x 16bit x 4 Banks DDR SDRAM Specification Revision 0.0 Apr. 2002 This is to advise Samsung customers that, until August 1, 2003, in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as

HYB25L512160AC

Abstract: HYE25L512160AC
Contextual Info: Data Sheet, Rev. 1.3, April 2004 HYB25L512160AC–7.5 512MBit Mobi le- RAM S t an d a r d T e m p e r at u r e R an g e M e m or y P r o du c t s N e v e r s t o p t h i n k i n g . The information in this document is subject to change without notice. Edition 2004-04

timing controller SHART

Abstract: T21N K4U52324Q SAMSUNG GDDR4 K4U52324QE-BC09 GDDR4
Contextual Info: 512M GDDR4 SGRAM K4U52324QE 512Mbit GDDR4 SGRAM 2M x 32Bit x 8 Banks Graphic Double Data Rate 4 Synchronous DRAM with Uni-directional Data Strobe and DLL 136Ball FBGA Revision 1.0 June 2006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

Contextual Info: K4S510832B CMOS SDRAM DDP 512Mbit SDRAM 16M x 8bit x 4 Banks Synchronous DRAM LVTTL Revision 0.2 April 2001 This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers,

Contextual Info: K4Y50164UC K4Y50084UC K4Y50044UC K4Y50024UC XDRTM DRAM TM 512Mbit XDR DRAM C-die Revision 1.0 December 2005 INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

HY27USXX121M

Abstract: package tsop1 512MBIT hynix nand HY27US HY27 HY27SSXX121M
Contextual Info: HY27SS 08/16 121M Series HY27US(08/16)121M Series 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash Document Title 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash Memory Revision History No. History Draft Date Remark 0.0 Initial Draft Sep.17.2003 Preliminary 0.1 Renewal Product Group

AS4C32M16S-7AI

Abstract: TSOP 54 II
Contextual Info: Datasheet | Rev. 1.1 | 2012 512Mbit Single-Data-Rate SDR SDRAM AS4C64M8S-7TCN 64Mx8 (16M x 8 x 4 Banks) AS4C32M16S-7TCN 32Mx16 (8M x 16 x 4 Banks) Datasheet Version 1. 1 1 512 Mbit SDRAM AS4C[08/16] Revision History R Rev. 1.1 April 2012 Revised Operating-; Standby- and Refresh Currents

Contextual Info: M65KC512AB 512Mbit 4 Banks x 4M x 32 , 133MHz Clock Rate, Bare Die, 1.8V Supply, Low Power SDRAM Preliminary Data Features summary • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 4MWords, each 32 bits wide ■ Supply Voltage – VDD = 1.7 to 1.9V (1.8V typical in

Contextual Info: FPGA Configurator FC512 Interconnect Systems, Inc. www.isipkg.com DATA SHEET FEATURES DESCRIPTION • Ultra-Compact Configuration Solution  512Mbit Flash + Controller  Supports up to 32-bit wide Fast Passive Parallel FPP configuration bus The FC512 is a single device configuration solution that

Contextual Info: 512MBit MOBILE SDR SDRAMs based on 4M x 4Bank x32 I/O Specification of 512M 16Mx32bit Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,194,304 x32 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

LA2 DT2

Abstract: BGA64 TC59LM906AMG TC59LM914AMG P-BGA64-1317-1
Contextual Info: TC59LM914/06AMG-37,-50 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 512Mbits Network FCRAM1 SSTL_18 / HSTL_Interface − 4,194,304-WORDS x 8 BANKS × 16-BITS − 8,388,608-WORDS × 8 BANKS × 8-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM914/06AMG is Fast Cycle

Contextual Info: M65KG512AB 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR Low Power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332Mbit/s max. for 6ns speed

gddr5

Abstract: K4N51163QC-ZC K4N51163QC-ZC25 K4N51163QC-ZC2A K4N51163QC-ZC33 K4N51163QC-ZC36
Contextual Info: 512M gDDR2 SDRAM K4N51163QC-ZC 512Mbit gDDR2 SDRAM Revision 1.5 October 2005 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

25l512

Abstract: 25L5121 HYB25L512160AC HYE25L512160AC 25l51216
Contextual Info: D a t a S he et , R e v . 1 . 2 , F e b . 2 00 4 HYB25L512160AC–7.5 HYE25L512160AC–7.5 512MBit Mobi le- RAM S t an d a r d T e m p e r at u r e R an g e E x t en d e d T e m p e r a t u r e R a n g e M e m or y P r o du c t s N e v e r s t o p t h i n k i n g .

BGA64

Abstract: TC59LM905AMB TC59LM913AMB
Contextual Info: TC59LM913/05AMB-50,-55 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 512Mbits Network FCRAM1 SSTL_2 Interface − 4,194,304-WORDS x 8 BANKS × 16-BITS − 8,388,608-WORDS × 8 BANKS × 8-BITS DESCRIPTION Network FCRAMTM is Double Data Rate Fast Cycle Random Access Memory. TC59LM913/05AMB is Network

H55S5132DFR

Abstract: H55S5122 h55s512 RA13 mobile MOTHERBOARD CIRCUIT diagram H55S5122DFR
Contextual Info: 512MBit MOBILE SDR SDRAMs based on 4M x 4Bank x32 I/O Specification of 512M 16Mx32bit Mobile SDRAM Memory Cell Array - Organized as 4banks of 4,194,304 x32 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

H5MS5162

Abstract: H5MS5162DFR h5ms5162dfr-j3m hynix mcp DDR333 DDR370 DDR400
Contextual Info: 512Mbit MOBILE DDR SDRAM based on 8M x 4Bank x16 I/O Specification of 512Mb 32Mx16bit Mobile DDR SDRAM Memory Cell Array - Organized as 4banks of 8,388,608 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

hy5rs123235b

Abstract: HY5RS123235BFP HY5RS123235
Contextual Info: HY5RS123235BFP 512Mbit 16Mx32 GDDR3 SDRAM HY5RS123235BFP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.