50DMB Search Results

Contextual Info: CY7C330 C Y P R E S S •0 Features • Twelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers

Contextual Info: CY7C277 '# C Y P R E S S Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 30-ns address set-up — 15-ns dock to output • Low power — 660 mW commercial — 715 mW (military) • Programmable address latch enable

TCO - 909 F 10 MHz

Abstract: TCO - 909 C335 CY7C335 TCO - 909 F C335A
Contextual Info: CY7C335 CYPRESS Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer

TCO - 909 F 10 MHz

Abstract: TCO - 909 F CERAMIC LEADLESS CHIP CARRIER C335 CY7C335
Contextual Info: CY7C335 CYPRESS Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer

Contextual Info: CY7C269 CYPRESS Features • CMOS for optimum speed/power • High speed commercial and military — 15-ns address set-up — 12-ns clock to output • Low power — 660 mW (commercial) — 770 mW (military) • On-chip edge-triggered registers — Ideal for pipelined micropro­

RJH 30 a3

Contextual Info: CY7C269 CYPRESS SEMICONDUCTOR • CMOS for optimum speed/power • High speed commercial and military — 15-ns max set-up — 12-ns clock to output • Low power — 660 mW (commercial) — 770 mW (military) • On-chip diagnostic shift register — For serial observability and con­

Contextual Info: CY7C291A CY7C292A/CY7C293A 'W CYPRESS = SEMICONDUCTOR Reprogrammable 2K x 8 PROM Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 2 0 ns commercial — 25 ns (military) • Low power — 660 mW (commercial and military)

C2653

Abstract: C2651 C2657 C2658 C2659 C2652 7c26 C2694 C2695 C265
Contextual Info: 1CY 7C26 5 CY7C265 8K x 8 Registered PROM Features If the asynchronous enable E is being used, the outputs may be disabled at any time by switching the enable to a logic HIGH, and may be returned to the active state by switching the enable to a logic LOW.

AU- 3JS

Abstract: C2682 333Q CY7C269 7c269 7C268 7C269-IS
Contextual Info: HbE D H E ä ö ^ b b S OOObflQÖ □ Q C Y P CY7C268 CY7C269 CYPRESS SEMICONDUCTOR 8192 x 8 Registered Diagnostic PROM Features Functional Description • CMOS for optimum speed/power • Highspeed — 15-ns max set-up —•12-ns clock to output • Low power

A10A

Abstract: 2kx8 EPROM PY291A 50wm 2K x 8 Reprogrammable PROM
Contextual Info: PY291A 2K X 8 REPROGRAMMABLE PROM FEATURES EPROM Technology for reprogramming Windowed devices for reprogramming High Speed – 20/25/35/50 ns Commercial – 35/50 ns (Military) Fully TTL Compatible Inputs and Outputs Standard Pinout (JEDEC Approved) – 24-Pin 300 mil DIP

333Q

Abstract: CY7C269 C2692
Contextual Info: CY7C269 CYPRESS Features • • C M O S for optim um speed/pow er • H igh speed com m ercial and m ilitary — 15-ns ad dress set-up • — 12-ns clock to output • O n-chip d iagn ostic sh ift register — For serial ob servability and con ­ trollab ility o f the ou tpu t register

C2694

Abstract: C2695 C269-3 C2698 7C26 C269 CY7C269 C2697 cerdip z PACKAGE C2696
Contextual Info: 1CY 7C26 9 CY7C269 8K x 8 Registered Diagnostic PROM Features • EPROM technology — 100% programmable • CMOS for optimum speed/power • High speed commercial and military — 15-ns address set-up — Reprogrammable (7C269W) • 5V ±10% VCC, commercial and military

CY7C265

Abstract: CY7C265-25QMB CY7C265-25WMB
Contextual Info: 65 CY7C265 8K x 8 Registered PROM Features are enabled. One pin on the CY7C265 is programmed to perform either the enable or the initialize function. • CMOS for optimum speed/power • High speed commercial and military — 15 ns address set-up If the asynchronous enable (E) is being used, the outputs may

CY7C291A

Abstract: CY7C292A CY7C293A 57C29
Contextual Info: F# CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial — 25 ns (military) CY7C291A CY7C292A/CY7C293A 2K X 8 Reprogrammable PROM • Direct replacement for bipolar PROMs • Capable o f withstanding >2001V stat­

al p13

Abstract: CERAMIC LEADLESS CHIP CARRIER cerdip z PACKAGE cy7c291 CY7C293AL-35PC PACKAGE CERAMIC LEADLESS CHIP CARRIER LCC CY7C291A CY7C292A CY7C293A
Contextual Info: CY7C291A CY7C292A/CY7C293A F# CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial — 25 ns (military) 2K X 8 Reprogrammable PROM • Direct replacement for bipolar PROMs • Capable o f withstanding >2001V stat­

Contextual Info: s rs y CYPRESS SEMICONDUCTOR Features • TWelve I/O macrocells each having: — registered, three-state I/O pins — input register clock select multi­ plexer — feed back multiplexer — output enable OE multiplexer • All twelve macrocell state registers

Contextual Info: CYPRESS SEMICONDUCTOR ~ Features • 100-MHz output registered operation • TVelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer — Output enable OE multiplexer

02JX

Abstract: cy7c291 CY7C291A CY7C292A CY7C293A SMD Code s13 CY7C291A-45DMB CY7C291-35WMB CY7C291-50QMB l64 diode
Contextual Info: Y P R E S S SEMICONDUCTOR 4bE » D S SflU b a 'T^fc-13-Z* CYPRESS SEMICONDUCTOR Features • Windowed for «program m ability • CMOS for optimum speed/power • High speed -¡•20 ns commercial — 25 ns (military) • Low power — 660 mW (commercial and military)

65842

Abstract: 333Q CERAMIC LEADLESS CHIP CARRIER ci 4030 CY7C277
Contextual Info: CY7C277 CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 30-ns address set-up — 15-ns clock to output • Low power — 660 mW commercial — 715 raW (military) • Programmable address latch enable

7C293A

Abstract: 7C291A
Contextual Info: CY7C291A CY7C292A/CY7C293A î f CYPRESS Features • Windowed for reprogrammability • CMOS for optimum speed/power • High speed — 20 ns commercial 2K X 8 Reprogrammable PROM The CY7C291A, CY7C292A, and CY7C293A are plug-in replacem ents for bipolar devices and offer the advantages of

CY7C335-50WMB

Abstract: C3359
Contextual Info: = # CY7C335 C YPRESS Universal Synchronous EPLD Features • 100-MHz output registered operation • Twelve I/O macrocells, each having: — Registered, three-state I/O pins — Input and output register clock se­ lect multiplexer — Feed back multiplexer

Contextual Info: CY7C277 CYPRESS SEMICONDUCTOR Reprogrammable 32K x 8 Registered PROM • Programmable address latch enable input • Programmable synchronous or asynchronous output enable • On-chip edge-triggered output registers • EPROM technology, 100% programmable

Contextual Info: CY7C265 CYPRESS 8K x 8 Registered PROM Features Functional D escription • CMOS for optimum speed/power • High speed commercial and military — 15 ns address set-up — 12 ns clock to output • Low power — 660 mW (commercial) — 770 mW (military)