50-PIN* TFT Search Results

SHARP LM64C08P

Abstract: LM64C08P Toshiba TLX LCD display toshiba TLX wiring pcb lcd display TLX-8062-C3X R16-2 R120 R129 R132
Contextual Info: V10815 Issued 11/1998 Digital ISA Bus Interface Card for Monochrome or Colour STN LCD Instruction Leaflet RS Stock No. 309-4474 Component side of card Pin and socket connectors -X3 -X1 50-pin flat panel connections for DSTN-LCDs 50-pin connection for other display technologies optional, use

Contextual Info: Preliminary specification TFS 140 - 1/2 Package, pin connection and 50 Ω matching network

Contextual Info: Preliminary specification TFS 140 C - 1/2 Package, pin connection and 50 Ω matching network

Contextual Info: Preliminary specification TFS 140 A - 1/2 Package, pin connection and 50 Ω matching network

Contextual Info: Filter specification TFS 70 F - 1/3 Package, pin connection and 50 Ω matching network see page 2.

BA rx transistor

Abstract: BA12003 TA6270F TA57 TA78 BA 560 3121a TA641
Contextual Info: T ransistors IT ransistor Arrays Pd mWfcircuit (Ta = 25'C) I, (mA/circuit) Type V, H (V) TA54 -70 10 50 50 TA57 -70 10 -50 50 TA76 40 oo 100 50 R„,(k£i) Vc,(V) I, (mA) 56 - 560 -3 -10 56 - 560 -3 10 56- 6 1 LF 12 pin TA78 40 None 100 50 56- 6 1 TA60 32

Contextual Info: »HYUNDAI HYM572A224A R-Series Unbuffered 2M x 72-bit CMOS DRAM MODULE with EXTENDED DATA OUT DESCRIPTION The HYM572A224A is a 2M x 72-bit EDO mode CMOS DRAM module consisting of two HY514404B in 20/26 pin SOJ or TSOP-II, four HY5118164B 42/42 pin SOJ or 44/50 pin TSOR-II and one 2048bit EEPROM on a 168 pin

UG-95

Contextual Info: “H Y U N D A I HYM5V36123A X-Sgnqs , U n U M I 1M x 36-bit CMOS DRAM MODULE DESCRIPTION The HYM5V36123A is a 1M x 36-bit Fast page mode CMOS DRAM module consisting of two HY51V18160B in 42/42 pin SOJ or 44/50 pin TSOPII and one HY51V4403B in 24/26 pin SOJ or TSOPII on a 72 pin glass-epoxy

TFD140

Contextual Info: Filter Specification 1. Measurement condition Ambient temperature TA: Input power level: Terminating impedances in fc: TFS 140 D - 1/3 Package, pin connection and 50 Ω matching network 23 °C dBm. for input: : 88,6 Ω  -36,16 pF for output: 50 Ω  0 pF,

Contextual Info: SIEMENS TEMPFET BTS114A Features • • • • N channel Enhancement mode Temperature sensor with thyristor characteristic The drain pin is electrically shorted to the tab ^ < 5 = r > \ 12 Pin Type BTS114A Vm 50 V 1 2 3 G D S h ftoKcn Package Ordering Code

Contextual Info: IBM11T4640MP 4M x 64 144 PIN SO DIMM Features Au contacts • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses Optimized for byte-write non-parity applications • 4Mx64 Fast Page Mode SO DIMM • Performance: -50

Contextual Info: ^HYUNDAI HYM564224A R-Series Unbuffered 2M x 64-bit CMOS DRAM MODULE _ with EXTENDED DATA OUT DESCRIPTION The HYM564224A is a 2M x 64-bit EDO mode CMOS DRAM module consisting of eight HY5118164B in 42/42 pin SOJ or 44/50 pin TSOP-II and one 2048 bit EEPROM on a 168 pin glass-epoxy printed circuit board. 0.1 ¡aF and

Contextual Info: IBM11T4645M 4M x 64 144 PIN SODIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses • 1Mx64 Extended Data Out SODIMM • Performance: -50 -60 Wc RAS Access Time 60ns 70ns ICAO CAS Access Time 13ns 15ns

LH64400

Abstract: m4006 sharp LH64400
Contextual Info: PRELIMINARY LH64400 / FEATURES • 1,048,576 x 4 bit organization • Access times: 80/100 ns MAX. • • C M O S 4M (1M x 4) Dynamic RA M PIN CONNECTIONS TO P VIEW 20-PIN DIP Cycle times: 140/160 ns (MIN.) Cycle time in high speed page mode: 50/55 ns (MIN.)

avasem

Contextual Info: AV9140 Integrated Circuit Systems, Inc. R4000 Frequency Generator Features Pin Configuration Ideally suited for R4000 family clock source Meets high and low time specifications Uses inexpensive 14.318 MHz reference crystal Selectable 50, 75 or 100 MHz output frequency

vectron

Contextual Info: tfs 140 D.doc Version 3.4 VI TELEFILTER 1. Measurement condition Ambient temperature TA: Input power level: Terminating impedances in fc: Filter Specification 06.01.02 TFS 140 D - 1/3 Package, pin connection and 50 Ω matching network 23 °C dBm. for input: :

Contextual Info: tfs 140 D.doc Version 3.4 VI TELEFILTER 1. Measurement condition Ambient temperature TA: Input power level: Terminating impedances in fc: Filter Specification 31.10.00 TFS 140 D - 1/3 Package, pin connection and 50 Ω matching network 23 °C dBm. for input: :

Contextual Info: CMOS 1 K x 9 FIFO TO P V IEW 28-PIN PDIP • Full CMOS Dual Port Memory Array • Fully Asynchronous Read and Write w C 1« 28 Dg C 2 27 □ d3 3 26 □ d5 C o • Fast Access Times: 15 720/25/35/50/65/80 ns PIN CONNECTIONS LJ < o FEATURES d. o2 C 4 25 ZI De

arbitration scheme of 8051

Abstract: memory arbitration scheme of 8051 FNS-100 100-PIN DS2502-E48 DS80C400 DS80C400-FCS DS80C400-FNS
Contextual Info: PRODUCT PREVIEW DS80C400 Network Microcontroller www.dalsemi.com FEATURES § § § § PIN ASSIGNMENT High-Performance Architecture − Single 8051 instruction cycle in 80 ns − DC to 50 MHz clock rate − Flat 16 MB address space for high level language support

Contextual Info: DS1L5DJ*K Series Published Page 1 of 3 3 Pin 50-Ohm Delay Lines (Patent Pending) DS1L5*J*K Series Description This family of delay lines features high bandwidth performance with high reliability for timing control applications with ±25 ps tolerances for time

Contextual Info: tfs70N.doc Version 1.6 VI TELEFILTER Filter specification 01.11.00 TFS 70 N 1. Measurement condition Package, pin connection and 50 Ω matching network Ambient temperature TA: Input power level: Terminating impedances in fc: 23 °C dBm. for input: 56,8 Ω ÷ê - 40,8 pF.

JESD22-C101B

Abstract: B.4X diode "network interface controller"
Contextual Info: Agilent AFBR-1010/AFBR-2010 Fiber Optic Transmitter and Receiver for 50 MBaud MOST Data Sheet Transmitter EOC Description AFBR-1010 Transmitter and AFBR-2010 Receiver are packaged in 4-pin transfer molded, low-cost packages ready for assembly into plastic fiber

Contextual Info: tfs70N.doc Version 1.6 VI TELEFILTER Filter specification 01.04.99 TFS 70 N 1. Measurement condition Package, pin connection and 50 Ω matching network Ambient temperature TA: Input power level: Terminating impedances in fc: 23 °C dBm. for input: 56,8 Ω  - 40,8 pF.

flow transmitter specification sheet

Abstract: "network interface controller" UJT specification
Contextual Info: Agilent AFBR 1010/AFBR-2010 Fiber Optic Transmitter and Receiver for 50 MBaud MOST Data Sheet Transmitter EOC Description AFBR-1010 Transmitter and AFBR-2010 Receiver are packaged in 4-pin transfer molded, low cost packages ready for assembly into plastic fiber