42140 Search Results

CY7C428-65PC

Abstract: CY7C419 CY7C421 CY7C425 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202 IDT7203
Contextual Info: fax id: 5404 CY7C419/21/25/29/33 -= C Y P R E S S 256/512 /1K /2K/4K x 9 Asynchronous FIFO Features • • • • • • • • • • • • • • • Asynchronous first-in first-out FIFO buffer memories 256 x 9 (CY7C419) 512 x 9 (CY7C421) 1 K x 9 (CY7C425)

B57861S0103F040

Abstract: EPCOS b57861 25727 15521 101490 B57861S0103H040 B57861 5103 5638-10 B57861S0103J040 B57861S0502 040
Contextual Info: NTC thermistors for temperature measurement Miniature sensors with bendable wires Series/Type: Date: B57861 March 2006 EPCOS AG 2006. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited.

CY7C

Abstract: 330 j65
Contextual Info: ~ g r ^ = » » » “ 'V ' a - ^ ; r n t Æ e i0 _ C Y 7 C 4 1 9 / 2 1 / 2 5 / 2 9 / 3 3 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421 )

GPIB-1014

Abstract: NI-488M
Contextual Info: Getting Started with Your GPIB-1014 Series Board and the NI-488M Software for Themis For GPIB-1014, GPIB-1014D, GPIB-1014DP, and GPIB-1014P Boards December 1993 Edition Part Number 320678-01 Copyright 1993 National Instruments Corporation. All Rights Reserved.

IEEE-1754

Abstract: leon3 processor vhdl leon3 vhdl model sparc v8 floatingpoint addition vhdl VHDL code for floating point addition processor control unit vhdl code leon3 RTAX2000S RTAX2000S-1
Contextual Info: IEEE-STD-754 Floating Point Unit GRFPU Lite / GRFPU-FT Lite CompanionCore Data Sheet GAISLER Features Description • IEEE Std 754 compliant, supporting all rounding modes and exceptions • Operations: add, subtract, multiply, divide, square-root, convert, compare, move, abs,

ECSS-E-50-12A

Abstract: ECSS-E-50-12 SpaceWire
Contextual Info: SpaceWire Codec with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet Features Description • Full implementation of SpaceWire standard ECSS-E-50-12A • Protocol ID extension ECSS-E-50-11 • RMAP protocol ECSS-E-50-11 • AMBA AHB back-end with DMA • Descriptor-based autonomous multi-packet

7011s

Abstract: BA 5977
Contextual Info: DATA SHEET APRIL 1997 LXT944 Revision 2.0 Quad Ethernet Interface Adapter The L X T944 is the first quad lO BA SE-T transceiver device w ith integrated filters. T he L X T944 Q uad E thernet A dapter is designed for IEEE 802.3 physical layer applica­ tions. T his single CM O S device includes all o f the active

Contextual Info: 9 0 3 -5 3 6 P -7 1 S NBTES: 1. 2. 3. REVISIONS DRAWING NO. DO NOT SCALE THIS DRAWING. PLATING MUST CDNFORM TO AMPHENDL SPEC 3 4 9 -5 0 5 6 0 . CONTACTS ARE GOLD PLATED, OTHER METAL PARTS ARE NICKEL PLATED. FOR CRIMPING USE TOOL 2 2 7 -9 4 4 , CRIMP DIE 8 2 7 -1 2 2 1 -0 3 CAVITY

Andrew heliax

Abstract: 106-1-a HJ7-50 HJ7RN-50A
Contextual Info: HELIAX” Coaxial C ab les •WB'* lÉató mmßx ■ '■ a # HJ7-50Â Cable Ordering Inform ation D escription Type No. Standard Cable HJ7-50A 1-5/8" Standard Cable, Standard Jacket Enhanced Power Cable 1-5/8" Cable with Polyolefin Dielectric for 25% increase in power ratings

Contextual Info: For More Information Visit 3M Electric Utility Splicing Web Pages / Glossary of Splicing Terms.316 Cable Types for Splicing. 317-319

B 503 Potentiometers

Abstract: cy7c421 COML-55 FF p21 CY7C419 IDT7200 IDT7201 IDT7202 IDT7203 IDT7204
Contextual Info: CY7C419/21/25/29/33 r* CYPRESS Features • 256 x 9, 512 x 9,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write • High-speed 50.0-MHz read/write independent o f depth/width • Low operating power — I c c i = 35 mA

TB2040

Contextual Info: DRW N O . SH ZONE REV ALL - SCR NUMBER A KLEC - 6 J V J F X . VERO 1 B K L EC- 6W9 PD 4. VERO 1 STIFFENER FEATURES RELEASE L of s i g n a l APPROVED JSG 07/02/04 K . LEBLANC HCL 12/12/05 K . LEBLANC HCL-MS 12/11/0 6 K . LEBLANC PRODUCTION MODIFIED TABLE

Contextual Info: D • SbMEEm 42140 Series Description □ □ □ 1 4 4 fl m/a-com T H MIC \ Silicon Low Noise Bipolar Transistor t 31-17 sem icondtBrlngton - Nominal fT - 4.5 GHz Nominal Current Range - 1 to 10 mA Ip Max. - 50 mA Frequency Range - 300 MHz to 2.0 GHz Geometry - 63

TRIAc TAG to-66

Abstract: TAG425-400 TAG480-600 tag 6 600 TAG265-600 TRIAC TAG425 600 TAG420-400 TRIAC TAG 600 TAG261-400 Triac tag
Contextual Info: flffli] TR IA C IN METAL AND PLASTIC PACKAGE ^ y TC-220AB TO-66 o ij a r~\ nkic ini i*j 12 A A RMS A NEW 30V 5 OV­ V k TAG TAB ! 1 DMC SALES TAG 240 IS O LA TED TYPE 241 P A D ESIG N ATIO N TAG 1Ç DMQ A PMC. FOR 245 TAG 246 IO 0V T A G 2 6 0 - 1 00 TAG261-100

AMBA ahb bus protocol

Abstract: leon3 leon AMBA LEON3FT
Contextual Info: Introduction GRMON is a debug monitor for the LEON Debug Support Unit DSU , providing a non-intrusive debug environment on real target hardware. The LEON DSU can be controlled through any AMBA AHB master and GRMON therefore supports communication through a large number of interfaces.

leon3

Abstract: RTAX2000 LEON3FT STK4050II vhdl code CRC ECSS-E-ST-50-11C ahb fsm KEY Component for MIL-STD-1553 IP Core for FPGA APB VHDL code AMBA ahb bus protocol
Contextual Info: SpaceWire CODEC with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet GAISLER Features Description • Full implementation of SpaceWire standard ECSS-E-ST-50-12C • Protocol ID extension ECSS-E-ST-50-11C • RMAP protocol ECSS-E-ST-50-11C • AMBA AHB back-end with DMA

AMBA AHB memory controller

Abstract: ASR17 IEEE-1754 leon3 LEON3FT asr19 Can 2.0 controller sparc v8 Memtech vhdl code for floating point multiplier
Contextual Info: SPARC V8 32-bit Processor LEON3 / LEON3-FT CompanionCore Data Sheet Features Description • • • • • • • • • • • The LEON3 is a 32-bit processor based on the SPARC V8 architecture. It implements a 7-stage pipeline and separate instruction and data caches

takamisawa LZ - 173

Abstract: TAKAMISAWA LZ 24 503 TAKAMISAWA LZ 182 guardian relay 192 1C 12 TAKAMISAWA LZ 177 american zettler date code takamisawa LZ 173 TAKAMISAWA LZ Schrack zf 132 012 NEC Relay MR31
Contextual Info: RELAY CATALOG • AMERICAN ZETTLER, INC. I T ’S A B E T T E R R E L A Y P o in t y o u r b r o w s e r to : http://www.azettler.com 5 American Zettler: Relay Manufacture for HVAC, Automotive, Telecommunications, General Purpose - Microsoft Internet Explorer 1

Contextual Info: 9 0 3 -5 3 6 P -7 1 S ifflTES» 1. 2. 3. REVISIONS DRAWING NO. DO NOT SCALE THIS DRAWING. PLATING MUST CDNFORM TO AMPHENOL SPEC 3 4 9 -5 0 5 6 0 . CONTACTS ARE GOLD PLATED, OTHER METAL PARTS ARE NICKEL PLATED. FOR CRIMPING USE TOOL 2 2 7 -9 4 4 , CRIMP DIE 8 2 7 -1 2 2 1 -0 3 CAVITY

168050

Abstract: 51169 3030-70 EPCOS 4684 101490 56326 B57867S0103F140 B57867S0103J140 27304 tr 13002
Contextual Info: NTC thermistors for temperature measurement Miniature sensors with bendable wires Series/Type: Date: B57867 March 2006 EPCOS AG 2006. Reproduction, publication and dissemination of this publication, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited.

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. k y COPYRIGHT - 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. - , - . ALL RIGHTS RESERVED. D 0.81 3±0.025 [.032±.001 ] n .080 .065 DIMPLE 4.06±0.08 [. 1 60+.003] I z I B 5 I 3' f 4 . 19+0.08 [. 1 65± 0 0 3 ]

Contextual Info: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT D AMP 1 4 71-9 REV 31MAR2000 3 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. —»— LOC DIST AF 50 REVISIONS L in REVISED PER Q G 3 A - 0 5 8 2 - 0 2 '2' C O N T IN U O U S S T R IP

SpaceWire

Abstract: AMBA APB bus protocol AMBA AHB DMA RTAX2000S AMBA AHB bus protocol r-map AMBA BUS vhdl code ahb fsm vhdl code for amba vhdl code AMBA AHB
Contextual Info: Description The GRSPW2 core implements a SpaceWire node interface with RMAP target and AMBA host interface. The core complies to the SpaceWire standard ECSS-E-ST-50-12C , the protocol identification extension (ECSS-E-ST-50-51C) and the RMAP protocol (ECSS-E-ST-50-52C). Receive and

PIN DIAGRAM OF RJ45 to usb

Abstract: PIN DIAGRAM OF RJ45 Intel JS28F640J3 FLASH device RJ45 low connector pcb board UT699 js28f640 WJLXT971A PIN DIAGRAM OF RJ45 10 pin wjlxt971 MATE-N-LOK pinout
Contextual Info: GR-UT699 Development Board User Manual AEROFLEX GAISLER AB Rev. 0.3, 2008-10-27 2 GR-UT699 Development Board User Manual Information furnished by Aeroflex Gaisler AB is believed to be accurate and reliable. However, no responsibility is assumed by Aeroflex Gaisler AB for its use, nor for any infringements