4164AP Search Results

AX2022

Abstract: TACT2150 D6142
Contextual Info: TACT2150 512 X 8 CACHE ADDRESS COMPARATOR D 2 9 9 3 . JA N U A R Y 1 9 8 7 - R E V IS E D SEPTEM BER 1967 Address to MATCH Valid Time TACT2150-20 . . . 20 ns max TACT2150-30 . . . 30 ns max DW, JD . OR NT PACKAGE 300-Mil 24-Pin Ceramic Side-Brazed or Plastic Dual-In-Line or Small Outline

27c eeprom

Abstract: 27C291 74TTL
Contextual Info: 0^1755 DG77HS TMS27C291, TMS27C292 16,384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ ONLY MEMORY SEPTEMBER 1988-R EV ISED APRIL 1988 • Single 5-V Power Supply • Pin Compatible with Existing 2K x 8 BIpolar/High-Speed CMOS EPROMs

Contextual Info: TEXAS INSTR -CASIC/MEMORY} Ì7 Ô Ë | flìtlTES D074Ô31 □ 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY FEBRUARY 1988 262,144 x 4 Organization JD PACKAGE TOP VIEW Performance Ranges: AC C ESS AC C ESS AC C ESS TIM E TIM E TIM E • e 4 5 ns *a(CA)

TMS4500

Abstract: TMS4500A
Contextual Info: TM S4500A DYNAMIC RAM CONTROLLER D 2 6 7 4 , JA N U A R Y 1 9 8 2 TMS4500A . . . N PACKAGE Controls Operation of 8K, 16K. 3 2 K , and 6 4 K Dynam ic RAMs TOP VIEW One Package Contains Address M ultiplexer, Refresh Control, and Timing Control Operates from Microprocessor Clock

TMS44C256

Abstract: TMS44C256-10 bojf tms44c251
Contextual Info: • a ^ L lT S S Q O T b 'n ? Q ■ TMS44C256, TMS44C257 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES INSTR 2 SE ASIC/MEMORY N PACKAGE (TOP VIEW) 262,144 x 4 Organization Single 5-V Supply (10% Tolerance) DQlC 1 Ü 20 ]Vss DQ2[ 2 193 004 wC 3 18 ]DQ3

TMS4C1024

Abstract: TMS4C1025-80 TMS4C1024-80 TMS4C1024-12 TMS4C1024/5/7S
Contextual Info: TMS4C1024, TMS4C1025, TMS4C1027 1 048 576-BIT DYNAMIC RANDOM-ACCESS MEMORIES S M G S 0 2 4 F — MAY 1986 — R E V IS E D N O V E M B E R 1990 1 048 576 x D[ 1 W[ 2 1 Organization U RAS [ 3 Single 5-V Supply 10% Tolerance Performance Ranges: TMS4C1024-60

Contextual Info: 1K x SN74ACT2151, SN74ACT2153 11 CACHE ADDRESS COMPARATORS _ D 3105, SEPTEM BER 19 8 7 -R E V iS E D MARCH 1990 Fast Address to Match Delay . . . 22 ns Max N PACKAGE TOP VIEW On-Chip Address/Data Comparator u R ESET [ 1 A4 [ A3 [ A2 [ A1 [ AO [ DO [

TMM4164AP-20

Abstract: 4164AP-15 4164-A 4164A TMM41 4164AP
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS 6 5 ,5 3 6 WORD X 4164AP-12, 4164AP-15 TMM41 64AP"20 1 BIT DYNAM IC RAM N CHANNEL SILICON GATE MOS DESCRIPTION M u ltip le x e d address in p u ts p e rm it th e T M M 4 1 6 4 A P to be packaged in a sta n d a rd 16 p in p la s tic D IP . T h is

TMS44C256

Abstract: sn74als6302 TMS4C1024 TMS4C1025-12 S4C1024 190TW TM024EAD9 tms*1024 TMS4C1024-12
Contextual Info: 0 ^ 1 7 5 5 007702=1 7 • TMS4C1024, TMS4C1025, TMS4C1027 1,048,576-BIT DYNAMIC RANDOM-ACCESS MEMORIES TEXAS INSTR N PACKAGE TOP VIEW 1,048,676 x 1 Organization Single 5-V Supply (10% Tolerance) • ACCESS ACCESS ACCESS TIME TIME TIME TMS4C102-10 TMS4C102.-12

sn74als6301

Abstract: sn74als6302
Contextual Info: SN74ALS6301, SN74ALS6302 DYNAMIC MEMORY CONTROLLERS D 2 9 0 0 , JA N U A R Y 1 9 8 6 -R E V IS E D M ARCH 1 98B Provides C ontrol for 1 6 K , 6 4 K . 2 5 6 K , and 1 M D yn am ic R A M s SN74ALS6301. S N 74A L S 63 02. . H igh est-O rder T w o -A d d re ss Bits S elect One

4164A

Abstract: 3A5 tube
Contextual Info: r TEXA S INSTR { A S I C / M E M O R Y } 17- D Ë J flTbl7ES 0 D 7 4 Ö 3 S A T - V 6 - Z 3 ~IS SMJ4C1027 1,048,576-BIT DYNAMIC RANDOM-ACCESS MEMORY FEBRUARY 1 9 8 8 1,048,576 x 1 Organization JD PACKAGE TOP VIEW Single 5-V Supply (1 0 % Tolerance) DC Performance Ranges:

k2000c

Abstract: 048576-BIT 4164 64k dram
Contextual Info: a à fi172S TEXAS IN ST R < A SIC /M E M O R Y TEXAS INSTR -CASIC/f1EH0RY> . 970 74833 D T - * / 6 ~2 3 ~ 5 D E | 0 ^ 1 7 5 5 0D74fl33 4 | S M J 4 C 1 0 2 4 1,048.576-BIT DYNAMIC RANDOM-ACCESS MEMORY FEBRUARY 1 9 8 8 1,048,576 x 1 Organization JD PACKAGE

tms4c1024

Abstract: TMS4C1024DJ
Contextual Info: fl1b].72S 007710G ^ • TM024HAC4 1,048,576 BY 4-BIT DYNAM IC RAM M ODULE — TEXAS INSTR • 1,048,576 x 4 Organization • Single 6-V Supply 10% Tolerance • 24-Pin Slngle-ln-llne Package (SIP) • Utilizes Four 1 Megabit Dynamic RAMs in Plastic Small-Outiine J-Lead (SOJ) Packages

Contextual Info: 0 ^ 1 7 2 5 0077b3S 4 SMJ44C256 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY INSTR ASIC/MEMORY 262,144 x 4 Organization ACCESS ACCESS ACCESS TIME T1MC TIME READ 01) ♦a(R) *a(C) ta(CA) WRITE <*RAC> {MAX) ttC A d (MAX) «CAAl (MAX) CYCLE SMJ44C256-12