4113B Search Results

AXP 188 ba

Abstract: 21071-DA 2mb1100 AXP 188 IC 5188b RSAD 5111 1M 21071-BA 82378IB 21071AA d327c
Contextual Info: m DECchip 21071-AA, 21072-AA Core Logic Data Sheet m A p ril 1994 21071-AA, 21072-A A Features: • Supports the entire fam ily of the DECchip 21064 Alpha AXP m icroprocessors • DECchip 21071-AA: 128-bit cache/64-bit memory • DECchip 21072-AA: 128-bit cache/128-bit

Contextual Info: DECchip 21171 Core Logic Chipset Technical Reference Manual Order Number: EC-QE18A-TE Revision/Update Information: Digital Equipment Corporation Maynard, Massachusetts aam i3t. 0 0 3 3 7 3 3 0 22 Preliminary—Subject to Change Ju ne 1995 W hile D igital believes th e inform ation in th is publication is correct as of th e d ate of publication,

RTS5158

Abstract: northbridge G41 se u10i layout GM965 28K1 IC NS0013 sla5t bga676 rtl8010 C1087
Contextual Info: A B C D E X'TAL 14.318MHz Merom Processor System Power Rail Management Dual-Core CLOCK GEN ICS9LPR358AGLFT uFCPGA 478 2 3,4 FSB (667/800 MHz) FSB 4 GM965/PM965 ATI M74M USB 1 LVDS ＊V ＊VS HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW HIGH HIGH HIGH ON

atmel 80C52

Abstract: 8051 and AT80C51RD2-3CSIM keyboard interfacing with 8051 VQFP44 package 8051 microcontroller Assembly language program How keyboard with 8051 works 80C51 80C52 AT80C51RD2 AT83C51RB2
Contextual Info: Features • 80C52 Compatible • • • • • • • • • • • • • • • • • • • – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratch Pad RAM – 8 Interrupt Sources with 4 Priority Levels – Dual Data Pointer

21071-AA

Abstract: ysd 2-11 invr 054
Contextual Info: m DECchip 21071-AA, 21072-AA Core Logic Data Sheet m A p ril 1994 21071-AA, 21072-A A Features: • Supports the entire fam ily of the DECchip 21064 Alpha AXP m icroprocessors • DECchip 21071-AA: 128-bit cache/64-bit memory • DECchip 21072-AA: 128-bit cache/128-bit

hall ic 49e

Abstract: 49e hall Hall ah42
Contextual Info: 1 About This Data Sheet This d a ta sheet provides a technical overview of the Alpha 21164 microprocessor, including: • Functional units • Signal descriptions • E xternal interface • In te rn al processor register IPR sum m ary • Privileged architecture library code (PALcode) instructions

AT80C51RD2-SLSUM

Abstract: TI PLCC44 Watchdog AT80C51RD2-RLRUM 80C51 80C52 AT80C51RD2 PDIL40 PLCC44 VQFP44 atmel 80C52
Contextual Info: Features • 80C52 Compatible • • • • • • • • • • • • • • • • • • • – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratch Pad RAM – 8 Interrupt Sources with 4 Priority Levels – Dual Data Pointer

atmel 80c52

Abstract: 80C51 80C52 AT83C51RB2 AT83C51RC2 PDIL40 PLCC44 VQFP44 FOSC-12
Contextual Info: Features • 80C52 Compatible • • • • • • • • • • • • • • • • • • – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratch Pad RAM – 8 Interrupt Sources with 4 Priority Levels – Dual Data Pointer

21171-BA

Abstract: 21171-CA DSW 100 M2 12H18 21164a tb0j
Contextual Info: DECchip 21171 Core Logic Chipset Technical Reference Manual Order Number: EC-QE18A-TE Revision/Update Information: Preliminary—Subject to Change Digital Equipment Corporation Maynard, Massachusetts • a a m i 3 t. 0 0 3 3 7 3 3 022 ■ Powered by ICminer.com Electronic-Library Service CopyRight 2003

Mys 99 178

Abstract: MYS 99 cj1w-cort21 NT31C-ST143-Ev3 MYS 99 133 E5CS-R1KJ 8203-M TL-X1R 4503m st MYS 99 102
Contextual Info: Product Code Description AA994896G 537.019.200 E2A 7033A 02A-M18KS08-WP-C1 5M OMC PF 1234C 11PFA PF 1235A 14PFA VAP 1001D 1VAP-1W VAP21001C 1VAP2-1 VAP21004H 1VAP2-2 VAP21015C 1VAP2-6 VE 2001G 1VE-10CA-11 VE 2002E 1VE-10CA-12 VE 2003C 1VE-10CA-13 VE 3001B

Contextual Info: 1 Microarchitecture The DECchip 21066 microprocessor implements Digital’s Alpha AXP architecture. The following sections provide an overview of the chip’s architecture and major functional units. Figure 1 is a block diagram of the DECchip 21066 microprocessor.

C1470 LM

Abstract: se u10i layout RTS5158 bga676 zd801 RTL8101E-GR PM965 hy5rs123235b W651DI R1287
Contextual Info: A B C D E X'TAL 14.318MHz Merom Processor System Power Rail Management Dual-Core CLOCK GEN ICS9LPR358AGLFT uFCPGA 478 2 3,4 FSB (667/800 MHz) FSB 4 PM965 ATI M74M USB 1 LVDS ＊V ＊VS HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW HIGH HIGH HIGH ON ON OFF

atmel 80C52

Abstract: T80C51RD2 16kx8 ram
Contextual Info: Features • 80C52 Compatible • • • • • • • • • • • • • • • • • • • – Four 8-bit I/O Ports – Three 16-bit Timer/Counters – 256 Bytes Scratch Pad RAM – 8 Interrupt Sources with 4 Priority Levels – Dual Data Pointer