400PS A2 Search Results

Contextual Info: LTC1520 50Mbps Precision Quad Line Receiver U DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18ns ±3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ

Contextual Info: www.fairchildsemi.com FMS9884A Graphics Digitizer 3x8-Bit, 100/140 Ms/s Triple Video A/D Converter with Clamps Features 3-channels 100/140Ms/s conversion rate Programmable Clamps 400ps PLL clock jitter Adjustable Gain and offset Internal Reference Voltage

MC10116

Abstract: LTC1520 LTC1520CS MC74AC04 MC74ACT04 MC10116 application motorola ro3
Contextual Info: LTC1520 50Mbps Precision Quad Line Receiver U DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18ns ±3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ

Contextual Info: High Resolution Track-and-Hold Amplifier □ ANALOG D EV IC ES AD389 FEATURES Companion to High Resolution A/D Converters Fast Acquisition Time: 2.5}*s to ±0.003% Low Droop Rate: 0.1 i V/| ls Aperture Jitter: 400ps Internal Hold Capacitor Unity Gain Inverter

LTC1520

Abstract: mc10116
Contextual Info: LTC1520 50Mbps Precision Quad Line Receiver U DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18ns ±3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ

MC10116

Abstract: MC74AC04 LTC1520 LTC1520CS MC74ACT04 MC10116 application motorola application notes mc10116
Contextual Info: Final Electrical Specifications LTC1520 50Mbps Precision Quad Line Receiver U DESCRIPTION FEATURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Precision Propagation Delay: 18ns ±3ns Over Temperature Data Rate: 50Mbps Low tPLH/tPHL Skew: 500ps Typ Low Channel-to-Channel Skew: 400ps Typ

400ps a2

Abstract: PLL102-108
Contextual Info: PLL102-108 Programmable DDR Zero Delay Clock Driver FEATURES • • • • • • PLL clock distribution optimized for Double Data Rate SDRAM application up to 266Mhz. Distributes one clock Input to one bank of ten differential outputs. Track spread spectrum clocking for EMI reduction.

Contextual Info: M312L6420CT0 184pin 1U Registered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx72 based on 64Mx4 DDR SDRAM Registered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 M312L6420CT0 184pin 1U Registered DDR SDRAM MODULE Revision History

Contextual Info: M368L6523MTL 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx64 based on 64Mx8 DDR SDRAM Unbuffered 184pin DIMM 64-bit Non-ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 M368L6523MTL 184pin Unbuffered DDR SDRAM MODULE Revision History

DDR200

Abstract: DDR266A DDR266B
Contextual Info: M470L6423CK0 200pin DDR SDRAM SODIMM 512MB DDR SDRAM MODULE 64Mx64 based on DDP 64Mx 8 DDR SDRAM 200pin SODIMM 64bit Non-ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 200pin DDR SDRAM SODIMM M470L6423CK0 Revision History Revision 0.0 (August 2001)

Contextual Info: M381L3223CTL 184pin Unbuffered DDR SDRAM MODULE 256MB DDR SDRAM MODULE 32Mx72 based on 32Mx8 DDR SDRAM Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 M381L3223CTL 184pin Unbuffered DDR SDRAM MODULE Revision History Revision 0 (Oct. 2001)

Contextual Info: M312L6420CT0 184pin 1U Registered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx72 based on 64Mx4 DDR SDRAM Registered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 184pin 1U Registered DDR SDRAM MODULE M312L6420CT0 Revision History

M470L3223BT0

Contextual Info: M470L3223BT0 200pin DDR SDRAM SODIMM 256MB DDR SDRAM MODULE 32Mx64 based on 32Mx 8 DDR SDRAM 200pin SODIMM 64bit Non-ECC/Parity Revision 0.1 June. 2001 Rev. 0.1 June. 2001 M470L3223BT0 200pin DDR SDRAM SODIMM Revision History Revision 0.0 (Apr. 2001) 1. First release.

M381L6523MT1

Abstract: DDR266A
Contextual Info: M381L6523MT1 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx72 based on 64Mx8 DDR SDRAM Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.0 September. 2001 Rev. 0.0 Sep. 2001 M381L6523MT1 184pin Unbuffered DDR SDRAM MODULE Revision History

Contextual Info: 172pin DDR Micro DIMM M463L3224BG0 256MB DDR SDRAM MODULE 32Mx64 based on 16Mx16 DDR SDRAM 172pin Micro DIMM 64-bit Non-ECC/Parity Revision 0.0 Apr. 2001 Rev. 0.0 Apr. 2001 M463L3224BG0 172pin DDR Micro DIMM Revision History Revision 0.0 (Apr. 2001) 1. First release

Contextual Info: M470L1714BT0 200pin DDR SDRAM SODIMM 128MB DDR SDRAM MODULE 16Mx64 based on 8Mx16 DDR SDRAM 200pin SODIMM 64-bit Non-ECC/Parity Revision 0.0 Apr. 2001 Rev. 0.0 Apr. 2001 M470L1714BT0 200pin DDR SDRAM SODIMM Revision History Revision 0.0 (Apr. 2001) 1. First release

DDR200

Abstract: DDR266A DDR266B M383L2920MT1
Contextual Info: M383L2920MT1 184pin Registered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72 based on 128Mx4 DDR SDRAM Registered 184pin DIMM 72-bit ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 M383L2920MT1 184pin Registered DDR SDRAM MODULE Revision History Revision 0 (Aug 2001)

DDR266A

Abstract: M368L6523MT1
Contextual Info: M368L6523MT1 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx64 based on 64Mx8 DDR SDRAM Unbuffered 184pin DIMM 64-bit Non-ECC/Parity Revision 0.0 September. 2001 Rev. 0.0 Sep. 2001 M368L6523MT1 184pin Unbuffered DDR SDRAM MODULE Revision History

DDR200

Abstract: DDR266A DDR266B M383L1713CT1
Contextual Info: M383L1713CT1 184pin Registered DDR SDRAM MODULE 128MB DDR SDRAM MODULE 16Mx72 based on 16Mx8 DDR SDRAM Registered 184pin DIMM 72-bit ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 184pin Registered DDR SDRAM MODULE M383L1713CT1 Revision History Revision 0.0 (Mar. 2001)

DDR200

Abstract: DDR266A DDR266B M383L3313CT1
Contextual Info: M383L3313CT1 184pin Registered DDR SDRAM MODULE 256MB DDR SDRAM MODULE 32Mx72(16Mx72*2 bank based on 16Mx8 DDR SDRAM) Registered 184pin DIMM 72-bit ECC/Parity Revision 0.3 May. 2002 Rev. 0.3 May. 2002 184pin Registered DDR SDRAM MODULE M383L3313CT1 Revision History

M368L1713CT1

Contextual Info: M368L1713CT1 184pin Unbuffered DDR SDRAM MODULE 128MB DDR SDRAM MODULE 16Mx64 based on 16Mx8 DDR SDRAM Unbuffered 184pin DIMM 64-bit Non-ECC/Parity Revision 0.2 May. 2002 Rev. 0.2 May. 2002 M368L1713CT1 184pin Unbuffered DDR SDRAM MODULE Revision History

Contextual Info: M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE 1GB DDR SDRAM MODULE 128Mx72(64Mx72*2 bank based on 64Mx8 DDR SDRAM) Unbuffered 184pin DIMM 72-bit ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 M381L2923MTL 184pin Unbuffered DDR SDRAM MODULE Revision History

Contextual Info: M368L6423CTL 184pin Unbuffered DDR SDRAM MODULE 512MB DDR SDRAM MODULE 64Mx64(32Mx64*2 bank based on 32Mx8 DDR SDRAM) Unbuffered 184pin DIMM 64-bit Non-ECC/Parity Revision 0.2 Jan. 2002 Rev. 0.2 Jan. 2002 184pin Unbuffered DDR SDRAM MODULE M368L6423CTL Revision History

Contextual Info: M470L0914BT0 200pin DDR SDRAM SODIMM 64MB DDR SDRAM MODULE 8Mx64 based on 8Mx16 DDR SDRAM 200pin SODIMM 64-bit Non-ECC/Parity Revision 0.0 Apr. 2001 Rev. 0.0 Apr. 2001 M470L0914BT0 200pin DDR SDRAM SODIMM Revision History Revision 0.0 (Apr. 2001) 1. First release