40 CLH Search Results
40 CLH Price and Stock
NXP Semiconductors S9S12G240F0CLH16-bit Microcontrollers - MCU 16-bit MCU, S12 core, 240KB Flash, 25MHz, -40/+85degC, Automotive Qualified, QFP 64 |
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S9S12G240F0CLH |
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40 CLH Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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powerex ME30
Abstract: powerex ME20 powerex ME10
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OCR Scan |
d001fl3dpowerex me30powerex me20powerex me10 | |
thyristor ot 112
Abstract: BUX 127 MARKING BUX MB11A02 diode V149 bux diode 800 300 CD420690 CD420640 CD421440
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OCR Scan |
72t4belcm4208a2cd420440cd420640+14 | |
rockwell 10937
Abstract: LED 2ma 4x7 SEGMENT LED DISPLAY MSC1162 MSC7128-xx msc1163 MSC1162A 16 seg led
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OCR Scan |
msc1163msc7171msc7165msc7166+12 | |
GR253
Abstract: GR-253-CORE
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14-ch14-clhgr-1244gr-253+3 | |
g813
Abstract: GR-1244 GR-1244-CORE GR-253 GR-253-CORE
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14-ch14-clhgr-253gr-1244-core+3 | |
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Contextual Info: DIL 14 STRATUM III TCXO DFA 14-CH 5 V & DFA 14-CLH (3.3 V) KEY FEATURES 20.3±0.1 5 to 52 MHz 15.24 12.7±0.1 Stratum III compliant over -40 to 85°C up to 20 Mhz Sonet Minimum Clock compliant over -40 to 85°C up to 52 MHz 7.62 PIN 1 DFA 14 N/C GND Output |
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14-ch14-clhgr-253gr-1244-core+1 | |
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Contextual Info: '%//W3 y lM V292BMC * Rev. D HIGH PERFORMANCE BURST DRAM CONTROLLER FOR Am29030/40 PROCESSORS *^ ▼ / í , *"c0*, • Pin/Software compatible with earlier V292BMC. • Integrated Page Cache Management. • Direct interfaces to Am 29030/40 processors. |
OCR Scan |
v292bmcam29030/40tm24-bit40mhz+5 | |
SLLS526AContextual Info: SN65LV1021/SN65LV1212 10 MHz TO 40 MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526A – FEBRUARY 2002 – REVISED APRIL 2002 D D D D 100–400 Mbps Serial LVDS Data Payload Bandwidth at 10 MHz to 40 MHz System Clock Pin-Compatible Superset of NSM DS92LV1021/DS92LV1212 |
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sn65lv1021/sn65lv1212slls526ads92lv1021/ds92lv1212sn65lv1021+2 | |
SLLS526CContextual Info: SN65LV1021/SN65LV1212† 10 MHz TO 40 MHz, 10:1 LVDS SERIALIZER/DESERIALIZER SLLS526C – FEBRUARY 2002 – REVISED MAY 2002 D D D D 100–400 Mbps Serial LVDS Data Payload Bandwidth at 10 MHz to 40 MHz System Clock Pin-Compatible Superset of NSM DS92LV1021/DS92LV1212 |
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sn65lv1021/sn65lv1212slls526cds92lv1021/ds92lv1212sn65lv1021+2 | |
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Contextual Info: T 0 Q 4 E D 0 D D D O H b b 212 V292BMC Rev. D HIGH PERFORMANCE BURST DRAM CONTROLLER :.V “ FOR Am29030/40 PROCESSORS • Pin/Software compatible with earlier V292BMC. • Integrated Page Cache Management. • Direct interfaces to Am29030/40 processors. |
OCR Scan |
v292bmcam29030/40512mb24-bit+4 | |
MO-150
Abstract: SN65LV1021 SN65LV1021DB SN65LV1212 SN65LV1212DB SN65LVDS1021 SN65LVDS1212 SLLS526B
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sn65lv1021/sn65lv1212slls526bds92lv1021/ds92lv121228-pin+7 | |
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Contextual Info: MOTORCLA SC XSTRS/R F 15E D I b3b?254 DOabSMfl 1 | M A X IM U M R A T IN G S Sym b o l Value Unit Collector-Emitter Voltage Rating VcEO 40 Vdc Collector-Base Voltage VCBO 40 Vdc Emitter-Base Voltage Veb o 5.0 Vdc ic 1.5 Ade Collector Current — Continuous |
OCR Scan |
md3762mq3762md3762f10a-04 | |
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Contextual Info: FACTSHEET F-199 CURRENT CAPACITIES 7 16 6 15 5 14 CURRENT AMPS 17 FWJ 13 12 3 2 TMM/CLT 1 10 20 30 40 50 60 70 80 90 100 110 100 110 90 100 110 90 100 110 AMBIENT TEMPERATURE (°C) 9 8 8 7 7 FWS 6 5 4 3 6 5 4 TMS/SMS FTS/CLP 3 TFM/SFM 2 2 1 1 10 20 30 40 |
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f-1991-800-samtec-9 | |
SAK-C505Contextual Info: Device Specifications C505 / C505C SIEMENS 10 10.1 Device Specifications Absolute Maximum Ratings Ambient temperature under bias 7A .- 40 "C to + 125 'C Storage temperature (TSJ). - 65 "C to + 150 "C |
OCR Scan |
c505cmcs033116e35b050103eb6+3 | |
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80C51
Abstract: 83C528 87C528 sot307-22 p87c528efaa 80C528
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87c52880c5183c528sot307-22+2 | |
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Contextual Info: H V 702 H V 712 Çh Supertex inc. Product Objective Specifications 220V 40-Channel Vacuum-Fluorescent Display Driver Ordering Information Package Options Device 60 Pin Plastic Guilwing Die HV702 HV702PG HV702X HV712 HV712PG HV712X Features General Description |
OCR Scan |
40-channelhv702hv702pghv702x+6 | |
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Contextual Info: Mates with: 8SW, CES, CLH. NO. PINS PER ROW SLW PLATING PI ROW OPTION U OPTION LEAD STYLE OTHER OPTION Features: =Polarized P o s itio n Specify S in g le R o w LEAD STYLE fro m c h a rt IT " v 1 v : . « JO If NO a t P W t t . t . Double Row *Si 40 C 01 |
OCR Scan |
1-800-samtec-9 | |
tvg for sonar
Abstract: ad600
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OCR Scan |
ad600/ad602ad600ad602mil-std-883+1 | |
DS92LV1021
Abstract: DS92LV1210 MSA28 deutsch rsm 07 deutsch rsm connector
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OCR Scan |
ds92lv1021ds92lv121010-bitthe30+3 | |
8051 PROGRAMING IN C
Abstract: 80C528 51ti 80C51 80C52 83C528 87C528 P80C528FBP
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OCR Scan |
87c52880c5183c52880c528+5 | |
87C196kc guide
Abstract: XLXX an87c196kc
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OCR Scan |
87c196kc16-bit10-bitsources/16+3 | |
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Contextual Info: LF48410 1024 x 24-bit Video Histogrammer RIPTION □ 40 MHz Data Input and Compu tation Rate □ 1024 x 24-bit Memory Array □ Histograms of Images up to 4K x 4K with 10-bit Pixel Resolution □ Memory Array Flash Clear □ User-Programmable Modes: Histogram, Histogram Accumulate, |
OCR Scan |
lf4841024-bit10-bitmil-std-883+3 | |
SLMA002
Abstract: TPA0232 TPA0252 TPA0252PWP TPA0252PWPG4 TPA0252PWPR TPA0252PWPRG4
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tpa0252slos288b24-pinslma002+5 | |
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Contextual Info: TPA0252 www.ti.com SLOS288B – JUNE 2000 – REVISED SEPTEMBER 2004 2.8-W STEREO AUDIO POWER AMPLIFIER WITH DIGITAL VOLUME CONTROL • • • • • • • • • • • Internal Memory Restores Volume Setting After Shutdown or Power Down Digital Volume Control From 20 dB to -40 dB |
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tpa0252slos288b24-pin | |