4-INPUT NAND GATES DATASHEET CMOS Search Results

UT54ACS20

Abstract: ACTS20 smd transistor marking y2 96526 96527 UT54ACTS20
Contextual Info: Standard Products UT54ACS20/UT54ACTS20 Dual 4-Input NAND Gates Datasheet November 2010 www.aeroflex.com/logic PINOUTS FEATURES ‰ 1.2 CMOS - Latchup immune ‰ High speed ‰ Low power consumption ‰ Single 5 volt supply ‰ Available QML Q or V processes ‰ Flexible package

CD4011BDMSR

Abstract: cd4* NAND H3W CERAMIC FLATPACK CMOS OR Gates 5962R9662101VCC 5962R9662101VXC CD4011B CD4011BMS CD4012B CD4012BMS
Contextual Info: CD4011BMS Device Information Printer Friendly Version CD4011BMS NAND, 2-Input, Quad, Rad-Hard, CMOS, Logic Get Datasheet Ordering Information Price Package MSL SMD US $ CD4011BDMSR Active Mil 14 Ld SBDIP N/A 5962R9662101VCC Contact Us Part No. Status Temp.

ACT00

Abstract: AC00 74ACT00 HARRIS
Contextual Info: CD54/74AC00, CD54/74ACT00 Data sheet acquired from Harris Semiconductor SCHS223A Quad 2-Input NAND Gate September 1998 - Revised June 2000 Features Description • Typical Propagation Delay - 3.2ns at VCC = 5V, TA = 25oC, CL = 50pF The ’AC00 and ’ACT00 are quad 2-input NAND gates that utilize the Advanced CMOS Logic technology.

Contextual Info: MM74HC00 Quad 2-Input NAND Gate Features General Description • Typical propagation delay: 8ns The MM74HC00 NAND gates utilize advanced silicongate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have

MM74HC00M

Abstract: MM74HC00 74ls gate symbols 74LS series logic gates 3 input or gate ttl NAND gate circuit 74HC 74LS M14A M14D MM74HC00MTC
Contextual Info: MM74HC00 Quad 2-Input NAND Gate Features General Description • Typical propagation delay: 8ns The MM74HC00 NAND gates utilize advanced silicongate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have

hct30 harris

Contextual Info: [ /Title CD54H C30, CD74H C30, CD74H CT30 /Subject (High Speed CMOS Logic 8- CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121B High Speed CMOS Logic 8-Input NAND Gate August 1997 - Revised March 2002 Features Description • Buffered Inputs

MM74HC00

Abstract: MM74HC00M M14A M14D MM74HC00MTC MM74HC00N MM74HC00SJ MTC14 74HC 74LS
Contextual Info: MM74HC00 Quad 2-Input NAND Gate Features General Description • Typical propagation delay: 8ns The MM74HC00 NAND gates utilize advanced silicongate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have

Contextual Info: [ /Title CD54 HC00, CD54 HCT00 , CD74 HC00, CD74 HCT00 /Sub- CD54HC00, CD54HCT00, CD74HC00, CD74HCT00 Data sheet acquired from Harris Semiconductor SCHS116A High Speed CMOS Logic Quad 2-Input NAND Gate January 1998 - Revised November 2002 Features Description

74ls gate symbols

Abstract: MM74HCT00, no of pins 20 ttl NAND gate circuit 74LS M14A M14D MM74HCT00 MM74HCT00M MM74HCT00MTC MM74HCT00N
Contextual Info: MM74HCT00 Quad 2 Input NAND Gate Features General Description • TTL, LS pin-out and threshold compatible The MM74HCT00 is a NAND gates fabricated using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS—low quiescent power

Contextual Info: MM74HCT00 Quad 2 Input NAND Gate Features General Description • TTL, LS pin-out and threshold compatible The MM74HCT00 is a NAND gates fabricated using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS—low quiescent power

74HCT10

Contextual Info: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54/74HC10, CD54/74HCT10 Data sheet acquired from Harris Semiconductor

d4093

Contextual Info: CD4093BĆQ1 CMOS QUAD 2ĆINPUT NAND SCHMITT TRIGGER SCLS608 − MARCH 2005 D Qualification in Accordance With D D D D D D D D 100% Tested for Quiescent Current at 20 V D Maximum Input Current of 1mA at 18 V Over AEC-Q100† Qualified for Automotive Applications

4011bc

Abstract: 4001BC SPICE cd4001 cd4001B spice CD4001BM
Contextual Info: CD4001BM CD4001BC Quad 2-Input NOR Buffered B Series Gate CD4011BM CD4011BC Quad 2-Input NAND Buffered B Series Gate General Description Features These quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors They have equal source

cd4023bcn

Contextual Info: Revised April 2002 CD4023BC Buffered Triple 3-Input NAND Gate General Description Features These triple gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and Pchannel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered

74hct10

Abstract: 74HC10
Contextual Info: [ /Title CD74 HC10, CD74 HCT10 /Subject (High Speed CMOS Logic Triple 3-Input NAND Gate) /Autho r () /Keywords (High Speed CMOS Logic Triple 3-Input NAND Gate, High Speed CMOS Logic Triple 3-Input NAND Gate, Harris Semi- CD54/74HC10, CD54/74HCT10 Data sheet acquired from Harris Semiconductor

Contextual Info: SN54LV132A, SN74LV132A QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS394C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

CD4011BCN

Abstract: 74LS series logic gates 3 input or gate CD4011BCM
Contextual Info: Revised March 2002 CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate • Quad 2-Input NAND Buffered B Series Gate General Description Features The CD4001BC and CD4011BC quad gates are monolithic complementary MOS CMOS integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current

5962-87549012A

Contextual Info: SN54AC00, SN74AC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), DIP

74hc30

Contextual Info: [ /Title CD54H C30, CD74H C30, CD74H CT30 /Subject (High Speed CMOS Logic 8- CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121D High Speed CMOS Logic 8-Input NAND Gate August 1997 - Revised September 2003 Features Description

74HC132

Abstract: 74VHC132 74VHC132M 74VHC132MTC 74VHC132MTCX 74VHC132MX 74VHC132SJ M14A VHC00 VHC132
Contextual Info: 74VHC132 Quad 2-Input NAND Schmitt Trigger tm Features General Description • High Speed: tPD = 3.9ns Typ. at VCC = 5V ■ Power down protection is provided on all inputs The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate

Contextual Info: SN54AC00, SN74AC00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCAS524C – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), DIP

Contextual Info: SN54AC10, SN74AC10 TRIPLE 3-INPUT POSITIVE-NAND GATES SCAS529B – AUGUST 1995 – REVISED SEPTEMBER 1996 D D EPIC  Enhanced-Performance Implanted CMOS 1-µm Process Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW)

Contextual Info: [ /Title CD54H C30, CD74H C30, CD74H CT30 /Subject (High Speed CMOS Logic 8- CD54/74HC30, CD54/74HCT30 Data sheet acquired from Harris Semiconductor SCHS121B High Speed CMOS Logic 8-Input NAND Gate August 1997 - Revised March 2002 Features Description • Buffered Inputs

cmos XOR Gates

Abstract: XNOR FAIRCHILD NC7SZ57 NC7SZ58 2 input XNOR GATE 2-input-XNOR using nand and not XNOR GATE application NC7SZ57L6X NC7SZ57P6X NC7SZ58L6X
Contextual Info: NC7SZ57, NC7SZ58 TinyLogic UHS Universal Configurable 2-Input Logic Gates Features General Description • Space saving SC70-6 lead surface mount package The NC7SZ57 and the NC7SZ58 are Universal Configurable 2-Input Logic Gates. Each device is capable of