4 BIT BINARY DECODER Search Results

8 bit binary to 7 segment

Abstract: 4 DIGIT DECADE COUNTER 4 digit 7 segment decoder 6-DIGIT DECADE COUNTER 4 bcd digit counter TC5054 TC5032 TC5051 HIGH FREQUENCY DECADE COUNTER BCD counter
Contextual Info: X41 Type Number TC40103B TC40107B TC40117B TC40161B TC40163B TC40174B TC40175B TC40192B TC40193B TC4502B Function 8-STAGE PRESETTABLE DOWN COUNTER 8-BIT BINARY TYPE DUAL 2-INPUT NAND BUFFER/DRIVER PROGRAMMABLE DUAL 4-BIT TERMINATOR PROGRAMMABLE BINARY COUNTER WITH ASYNCHRONOUS CLEAR

74c83

Abstract: 4020 divider 74C48 4013 divider 74C151 74c74 74C42 74C107 74c157 HD-74C151
Contextual Info: FUNCTIONAL CROSS REFERENCE OF HD-4000 SE R IES AND HD-54C/74C SERIES ARITH M ETIC FUNCTIONS Four-Bit Binary Full Adder Four-Bit Magnitude Com parator 4000 SE R IE S 54C/74C* SE R IE S H D -4 0 0 8 H D -74 C 8 3 H D -7 4 C 8 5 COUNTERS 7 Stage Binary 12 Stage Ripple-Carry Binary

M74LS156P

Abstract: 20-PIN M74LS155P
Contextual Info: MITSUBISHI LSTTLs M74LS156P DUAL 2 -B IT BINARY TO 4-LINE DECODER/DEMULTIPLEXER W ITH OPEN COLLECTOR OUTPUT DESCRIPTION PIN CONFIGURATION TOP VIEW The M 74L S 15 6P is containing tw o a semiconductor integrated circuit 2-bit binary to 4-line decoders/dem ulti­

Contextual Info: Hyòfid Syskofris |~|0 33806 Multiplying, Voltage Output, fxP Compatible 12-Bit DAC FEATURES • 2- and 4-Quadrant Multiplying ■ Coding: Binary; Offset Binary ■ Linearity: ±0.01% ■ Settling Time: 2.5/uS ■ juP Compatible ■ 28-Pin Package ■ CMOS, T T L Compatible

14-SOP-225B

Abstract: crystal 3.579545MHZ dtmf dialer 14-DIP-300 KS58015 KS58015D KS58015N
Contextual Info: KS58015 DTMF DIALER FOR BINARY DATA-IN INTRODUCTION 14-DIP-300 The KS58015 is a DTMF dialer for 4 bit binary data input from microprocessor. When the tone enable input low, the oscillator is inhibited and the device is in a low power consumption at standby mode.

dtmf dialer

Abstract: 14-SOP-225B DTMF DEcoder FREQUENCY datasheets tone Dialer S5T0167 S5T0167X01-D0B0 S5T0167X01-S0B0 94-1 transistor
Contextual Info: DTMF DIALER FOR BINARY DATA-IN S5T0167 INTRODUCTION 14−DIP−300 The S5T0167 is a DTMF dialer for 4 bit binary data input from the microprocessor. When the tone enable input is low, the oscillator is inhibited and the device is in a low power consumption at standby

tone Dialer

Abstract: 14-SOP-225B S5T0167 S5T0167X01-D0B0 S5T0167X01-S0B0 94-1 transistor
Contextual Info: DTMF DIALER FOR BINARY DATA-IN S5T0167 INTRODUCTION 14−DIP−300 The S5T0167 is a DTMF dialer for 4 bit binary data input from the microprocessor. When the tone enable input is low, the oscillator is inhibited and the device is in a low power consumption at standby

74LS

Abstract: CD4028BC CD4028BCM CD4028BCN M16A MS-001 N16E
Contextual Info: Revised January 1999 CD4028BC BCD-to-Decimal Decoder General Description Features The CD4028BC is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the 4 inputs, A, B, C, and D, results in a high level at the selected 1-of-10 decimal decoded outputs. Similarly, a 3-bit binary code applied

Contextual Info: F LS TTL DN74LS Series DN74LS156 DN74LS156 Dual 2-line to 4-line Decoders / Demultiplexers with Open Colector Outputs • Description P-2 DN74LS156 contains two 2-bit binary to quarternary decoder/demultiplexer circuits with open collector outputs. ■ Features

M74LS138P

Abstract: M74LSI38P demultiplexer demultiplexer ic 20-PIN pin diagram 14 demultiplexer binary decorder decorder 3 line to 8 line
Contextual Info: DESCRIPTION The M74LS138P is a semiconductor integrated circuit PIN CONFIGURATION TOP VIEW consisting o f a 3-bit binary-octal decoder/dem ultiplexer w ith enable inputs. FEATURES • 3 classes o f enable inputs • 4 to 16 decorder/dem ultiplexer functions are provided

Contextual Info: LS TTL DN74LS Series DN74LS139 DN74LS139 Dual 2 -lin e to 4 -lin e Decoders / Demultiplexers H Description P -2 D N 74LS139 contains tw o 2-bit binary to quaternary de­ coder/dem ultiplexer circuits, each w ith independent enable input term inals. • Features

DN74LS155

Abstract: MA161
Contextual Info: LS TTL DN74LS Series DN74LS155 DN74LS155 Dual 2 -lin e to 4 -lin e D e c o d e r s / Demultiplexers P-2 • Description DN74LS155 contains two 2-bit binary to quarternary decoder/demultiplexer circuits. ■ Features • Low output impedance • Enable inputs

74C926

Abstract: IC 74C926 circuit diagram of IC 74C926 pin configuration for ic 74c926 circuit diagram of IC MM74C926 pin diagram of IC MM74C926 TTL 74L04 TIL306 Application Notes ic CD4027 icl7104-16cp
Contextual Info: ICL8052/ICL7104 and ICL8068/ ICL7104 1 6 / 1 4 / 1 2 B it B inary A / D C o n verter P airs fo r ¿¿Processors FEATURES • 16 bit binary three-state latched outputs plus polarity and overrange. Also 14 and 12 bit versions. • Ideally suited for interface to UARTs,

74HC138

Abstract: GD74HCT138 74HCT138 GD54HC138 GD74HC138 74HC 74ls138 demultiplexer
Contextual Info: GD54/74HC138, GD54/74HCT138 3-TO-8 LINE DECODER/DEMULTIPLEXER General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 3 8 . Each device has 3 Binary select A, B, and C , and decodes A 3-Bit address to 1 -of-8 active-LOW outputs. This device features three chip

DN74LS156

Abstract: ab2c
Contextual Info: LS TTL DN74LS Series D N 7 4 L S 1 5 6 DN74LS156 IV 7 ^ r5 & Dual 2-lin e to 4 -lin e Decoders / Demultiplexers with Open Colector Outputs) P-2 • Description D N 74LS156 contains tw o 2-bit binary to quarternary d ecoder/dem ultiplexer circuits w ith open collector outputs.

TIL311

Abstract: TIL311 equivalent hexadecimal display LED hexadecimal display D1176 hexadecimal led display driver Header, 4 pin, 0.1 Inch Spacing binary to led display decoder
Contextual Info: TIL311 HEXADECIMAL DISPLAY WITH LOGIC SODS001D – D1176, MARCH 1972 – REVISED FEBRUARY 1992 SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA • • • • • • 7,62-mm 0.300-Inch Character Height

DP LED 714

Contextual Info: m H ill f f m !• I # ■ 4N56 Hexadecimal Display With Logic Texas Optoelectronics, Inc. HERMETICALLY SEALED SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA • Available with Screening in Accordance

M74LS256P

Abstract: 20-PIN 251C
Contextual Info: M IT S U B IS H I LSTTLs M 74LS256P D U A L 4 - B IT A D D R E S S A B L E LA TC H DESCRIPTION The M 74L S 25 6P PIN CONFIGURATION TOP VIEW is a semiconductor integrated circuit containing a dual dem ultiplexer circuit configured into a 4-bit latch addressable in 2-bit binary code.

ADG508A

Abstract: DG508 DG508A DG509 HI-508 JESD78 SOIC16 TSSOP16 DG508BEY-T1-E3 DG508 connection diagram
Contextual Info: DG508B, DG509B Vishay Siliconix Precision 8-Channel/Dual 4-Channel CMOS Analog Multiplexers DESCRIPTION FEATURES The DG508B is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address A0,

TIL311

Abstract: hexadecimal display
Contextual Info: TIL311 HEXADECIMAL DISPLAY WITH LOGIC SODS001D – MARCH 1972 – REVISED DECEMBER 1997 SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA D D D D D D 0.300-Inch 7,62-mm Character Height High Brightness

DG508BEY-T1-E3

Abstract: DG509bey ADG508A DG508 DG508A DG509 JESD78 SOIC16 TSSOP16 dg508bej
Contextual Info: DG508B, DG509B Vishay Siliconix Precision 8-Channel/Dual 4-Channel CMOS Analog Multiplexers DESCRIPTION FEATURES The DG508B is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address A0,

TIL311

Abstract: TIL311 equivalent binary to led display decoder
Contextual Info: TIL311 HEXADECIMAL DISPLAY WITH LOGIC SODS001D – MARCH 1972 – REVISED DECEMBER 1997 SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA D D D D D D 0.300-Inch 7,62-mm Character Height High Brightness

Contextual Info: GD54/74HC138, GD54/74HCT138 3-TO-8 LINE DECODER/DEMULTIPLEXER G eneral D e s c rip tio n These devices are identical in pinout to the 5 4 /7 4 L S 1 38. Each device has 3 Binary select A, B, and C , and decodes A 3-Bit address to 1 -of-8 active-LOW outputs. This device features three chip

DG406

Abstract: DG406DJ DG406DJ-E3 DG406DN DG406DW DG407 DG407DJ
Contextual Info: DG406, DG407 Vishay Siliconix 16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers DESCRIPTION FEATURES The DG406 is a 16 channel single-ended analog multiplexer designed to connect one of sixteen inputs to a common output as determined by a 4-bit binary address. The DG407