4 BIT Search Results

74LS340

Abstract: 74ls310 74ls344 74LS210 74LS341 74S210 74L310 ls344 74LS31 74s310
Contextual Info: 8-Bit Buffers with Schmitt Trigger Inputs Features S N 5 4 /7 4 L S 3 1 0 S N 5 4 /7 4 S 3 1 0 S N 5 4 /7 4 L S 3 4 0 S N 5 4 /7 4 S 3 4 0 S N 5 4 /7 4 L S 3 4 1 S N 5 4 /7 4 S 3 4 1 S N 5 4 /7 4 L S 3 4 4 S N 5 4 /7 4 S 3 4 4 Ordering Information • Schmitt-trigger Inputs guarantee high noise margin

74LS210

Abstract: SN74LS210 SN54/74LS210 SN74S210 42A12A 74S210 2y2e
Contextual Info: 8-Bit Buffers SN 54/74LS210 S N 54/74S 210 S N 5 4 /7 4 L S 2 4 0 S N 5 4 /7 4 L S 2 4 1 S N 5 4 /7 4 L S 2 4 4 S N 5 4 /7 4 S 2 4 0 S N 5 4 /7 4 S 2 4 1 S N S 4 /7 4 S 2 4 4 Ordering Information Features/ Benefits • Three-slate outputs drive bus lines PART

Contextual Info: 8-Bit Buffers S N 5 4 /7 4 L S 2 1 0 S N 5 4 /7 4 L S 2 4 0 S N 5 4 /7 4 L S 2 4 1 S N 5 4 /7 4 L S 2 4 4 F e a tu re s / Benefits S N 5 4 /7 4 S 2 1 0 S N 5 4 /7 4 S 2 4 0 S N 5 4 /7 4 S 2 4 1 S N 5 4 /7 4 S 2 4 4 Ordering Inform ation • Three-state outputs drive bus lines

FP-80B

Contextual Info: H D 4 0 4 8 1 8 /H D 4 0 4 8 1 4 /H D 4 0 7 4 8 1 8 — H D 4 0 L 4 8 1 8 /H D 4 0 L 4 8 1 4 /H D 4 0 7 L 4 8 1 8 Description T he H D 4 04 8 1 8 /H D 4 0 4 81 4 /H D 40 7 4 8 18/ HD40L4818/HD40L4814/HD407L4818 is a 4-bit single-chip HMCS400 series microcomputer

Contextual Info: QSFCT240T, 241T, 244T, 2240T, 2241T, '* High Speed CMOS 8-Bit Buffers/Line Drivers Q 2244T rQ S 5 4 /7 4 F C T 2 4 0 T Q S 5 4 /7 4 F C T 2 4 1 T * 4 Q S 5 4 /7 4 F C T 2 4 4 T ' » • Q S 5 4 /7 4 F C T 2 2 4 0 T Q S ¿ 4 /7 4 F C T 2 2 4 1 T / Q S 5 4 /7 4 F C T 2 2 4 4 T

j1y4 DIODE

Abstract: fct 2240 fct2244 fct244 m12g 74FCT FCT240 2244 diodes in mil grade QS54 74FCT ORDERING
Contextual Info: QUALITY SEMICONDUCTOR Q S 5 4 /7 4 F C T 2 4 0 Q S 5 4 /7 4 F C T 2 4 1 Q S 5 4 /7 4 F C T 2 4 4 High Speed CMOS 8-Bit Buffers/Line Drivers Q ING. Q S 5 4 /7 4 F C T 2 2 4 0 Q S 5 4 /7 4 F C T 2 2 4 1 Q S 5 4 /7 4 F C T 2 2 4 4 FE A T U R E S /B E N E F IT S

LGL2G

Abstract: 241T ic 74FCT H 498 FCT240
Contextual Info: Q S F C T 2 40 T , 2 4 1 T, 244T , 22 4 0 T , 22 41T, Q S 5 4 /7 4 F C T 2 4 0 T Q S 5 4 /7 4 F C T 2 4 1 T Q S 5 4 /7 4 F C T 2 4 4 T High Speed CMOS 8-Bit Buffers/Line Drivers Q 2244T Q S 5 4 /7 4 F C T 2 2 4 0 T Q S 5 4 /7 4 F C T 2 2 4 1 T Q S 5 4 /7 4 F C T 2 2 4 4 T

logic ic 7476 pin diagram

Abstract: logic ic 74LS76 pin diagram ic 74109 74LS107 74109 dual JK IC 74196 7476 Connection diagram 74LS109 ic 7474 pin diagram 7474 D latch
Contextual Info: IO PO 10 ro o CO 00 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch - o to Item 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch 4-Bit D Latch 4-Bit RS Latch 4-Bit RS Latch 4-Bit RS Latch 4-Bit RS Latch 5477 54/7475 93L14 9314

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT ;iP D 4 5 6 4 4 4 1 , 4 5 6 4 8 4 1 , 4 5 6 4 1 6 3 64M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD4564441, 4564841, 4564163 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 4,194,304 x 4 x 4, 2,097,152 x 8 x 4, 1,048,576 x16 x 4 word x bit x bank , respectively.

d4564841

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT ;iP D 4 5 6 4 4 4 1 , 4 5 6 4 8 4 1 , 4 5 6 4 1 6 3 64M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD4564441, 4564841, 4564163 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 4,194,304 x 4 x 4, 2,097,152 x 8 x 4, 1,048,576 x16 x 4 word x bit x bank , respectively.

ic 74163 8- bit up counter

Contextual Info: 4160B 4161B 4162B 4163B R&E INTERNATIONAL, INC CMOS SYNCHRONOUS 4-BIT COUNTERS FEATURES ♦ 4 4 4 4 4 4 4 BCD Decade 4160B , 4162B or 4-Bit Binary ( 4161B, 4163B) Counting Internal Look-Ahead for Fast Counting Carry Output for Cascading Synchronously Programmable

4217400-60

Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ ///PD42S16400,4216400,42S17400,4217400 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, FAST PAGE MODE Description T h e / I P D 4 2 S 1 6 4 0 0 , 4 2 1 6 4 0 0 , 4 2 S 1 7 4 0 0 , 4 2 1 7 4 0 0 a re 4 ,1 9 4 ,3 0 4 w o rd s b y 4 bits C M O S d y n a m ic R A M s . T h e

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿ P D 4 5 6 4 4 4 1 -A 7 5 , 4 5 6 4 8 4 1 -A 7 5 64M-bit Synchronous DRAM, 133MHz 4-bank, LVTTL Description The ,uPD4564441-A75, 4564841-A75 are high-speed 67,108,864-bit synchronous dynamic random-access memories, organized as 4,194,304 x 4 x 4 and 2,097,152 x 8 x 4 word x bit x bank , respectively.

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT ju P D 4 5 6 4 4 4 1 ,4 5 6 4 8 4 1 , 4 5 6 4 1 6 3 64 M-bit Synchronous DRAM 4-bank, LVTTL Description The ,uPD4564441, 4564841, 4564163 are high-speed 67,108,864-bit synchronous dynam ic random-access memories, organized as 4,194,304x4x4, 2,097,152x8x4, 1,048,576x16x4 word x bit x bank , respectively.

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT /¿PD42S16400L, 4216400L, 42S17400L, 4217400L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, FAST PAGE MODE Description T h e /¿ P D 4 2 S 1 6 4 0 0 L , 4 2 1 6 4 0 0 L , 4 2 S 1 7 4 0 0 L , 4 2 1 7 4 0 0 L a re 4 ,1 9 4 ,3 0 4 w o r d s b y 4 b it s d y n a m ic C M O S R A M s .

TMS4416

Abstract: 16KX4 20D6 SMJ4416 RP1001
Contextual Info: MOS LSI TMS4416, SMJ4416 16,384-WORD BY 4-BIT DYNAMIC RAM AUGUST 1980 - 1 6 ,3 8 4 X 4 Organization • Performance Ranges: ACCESS TIME ROW ADDRESS MAX '4 4 1 6 -1 2 '4 4 1 6 -1 5 '4 4 1 6 -2 0 • 1 20 1 50 200 ns ns ns ACCESS TIME COLUMN ADDRESS (MAX)

Contextual Info: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT /¿ P D 4 5 6 4 4 4 1 -A 7 5 , 4 5 6 4 8 4 1 -A 7 5 64M-bit Synchronous DRAM, 133MHz 4-bank, LVTTL Description The ^¡PD4564441-A75, 4564841-A75 are high-speed 67,108,864-bit synchronous dynam ic random-access

HM472114P-3

Abstract: 2114L HM472114-3 HM472114-4 HM472114P-4
Contextual Info: H M 4 7 2 1 14 -3 ,H M 4 7 2 1 14-4, H M 4 7 2 1 1 4 P -3 ,H M 4 7 2 1 1 4 P -4 1024-word X 4-bit Static Random Access Memory • Fast Access T im e .* . • L o w O pe ratin g Pow er .

2114L

Contextual Info: H M 4 7 2 1 14 -3 ,H M 4 7 2 1 14-4, H M 4 7 2 1 1 4 P -3 ,H M 4 7 2 1 1 4 P -4 1024-word X 4-bit Static Random Access Memory • Fast Access T im e .* . • L o w O pe ratin g Pow er .

74fct2245

Contextual Info: QUALITY Q SEMICONDUCTOR High Speed CMOS 8-Bit Transceivers INC. Q S 5 4 /7 4 F C T 2 4 5 Q S 5 4 /7 4 F C T 6 4 0 Ä Q S 5 4 /7 4 F C T 2 2 4 5 Q S 5 4 /7 4 F C T 2 6 4 0 F E A T U R E S /B E N E F IT S • Pin and function compatible to the 74F245/640 74 FCT245/640.

Contextual Info: Q S FC T646T, 648T, 2646T, 2648T Q High Speed CMOS 8-bit Bus Interface Register Transceivers Q S 5 4 /7 4 F C T 6 4 6 T Q S 5 4 /7 4 F C T 6 4 8 T Q S 5 4 /7 4 F C T 2 6 4 6 T Q S 5 4 /7 4 F C T 2 6 4 8 T F E A T U R E S /B E N E F IT S • Pin and function compatible to the 74F646/8

KM44C4000-7

Abstract: KM44C4000-8 KM44C4000 KM44C4000-6 dram 4mx4 taa 723 304X4
Contextual Info: KM44C4000 CMOS DRAM 4 M X 4 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung K M 4 4 C 4 0 0 0 is a high speed CMOS 4 ,1 9 4 ,3 0 4 X 4 Dynamic Random A ccess M em ory. Its design is optim ized fo r high perform ance applications

l1209

Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT _ _ _ _ _ _ _ / /iPD42S16400L, 4216400L, 42S17400L, 4217400L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, FAST PAGE MODE Description T h e /JP D 4 2 S 16 4 0 0L , 4 21 6 4 0 0 L , 4 2 S 1 7 4 0 0 L , 4 2 1 7 4 0 0 L a re 4 194 304 w o r d s b y 4 b its d y n a m ic C M O S R A M s .

Contextual Info: HB56UW472EJN Series, HB56UW464EJN Series HB56UW472EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 72-bit, 4 k Refresh, 1-Bank Module 18 pcs of 4 M X 4 Components HB56UW464EJN 32 MB Unbuffered EDO DRAM DIMM 4-Mword X 64-bit, 4 k Refresh, 1-Bank Module (16 pcs of 4 M X 4 Components)