39BIT Search Results

Contextual Info: THCV216_Rev.1.00_E_Brief THCV216 V-by-One HS High-speed video data receiver General Description Features THCV216 is designed to support video data transmission between the host and display. This chip can receive 39bit video data and 3bit control data via only a single differential cable at an

Contextual Info: THCV215_Rev.1.00_E_Brief THCV215 V-by-One HS High-speed video data transmitter General Description Features THCV215 is designed to support video data transmission between the host and display. This chip can transmit 39bit video data and 3bit control data via only a single differential cable at an

THCV216

Abstract: V-by-One HS lvds 1080p TSSOP64 V-by-One 20MHZ 32bit RGB36bit
Contextual Info: HOME ＞ Products ＞ V-by-One HS ＞ THCV216 Products V-by-One® V-by-One®HS LED Driver THCV216 V-by-One® Power IC LVDS THCV216 is a V-by-One®HS SerDes receiver. THCV216 can convert 2 lane V-by-One®HS into 39bit LVDS dual pixel link, and receive nominal 3Gbps video data per lane. This chipset can

THCV215

Abstract: lvds 1080p V-by-One TSSOP64 THCV 20MHZ 12690 24bit to1080p thcv21
Contextual Info: HOME ＞ Products ＞ V-by-One HS ＞ THCV215 Products V-by-One® V-by-One®HS LED Driver THCV215 V-by-One® Power IC LVDS THCV215 is a V-by-One®HS SerDes transmitter. THCV215 can convert 39bit LVDS dual pixel link into 2 lane V-by-One®HS, and transfer nominal 3Gbps video data per lane. This chipset

Contextual Info: 32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT FEATURES: IDT49C460 IDT49C460A IDT49C460B IDT49C460C IDT49C460D IDT49C460E DESCRIPTION: • Fast Detect 10ns max. 12ns (max.) 16ns (max.) 25ns (max.) 30ns (max.) 40ns (max.) Correct 14ns (max.) 18ns (max.)

Contextual Info: IME D INTEGRATED DEVICE • 4Ö2S771 0003^22 1 ■ 16-BIT CMOS ERROR DETECTION AND CORRECTION UNIT MICROSLICE PRODUCT FEATURES: • • ■ T -¥ £ -/7 Pin-compatible to all versions of the 2960 • Military product available compliant to MIL-STD-883, Class B

Contextual Info: Integrated Device Technology, Inc. 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT FEATURES IDT49C465 IDT49C465A DESCRIPTION 32-bit wide Flow-thruEDC unit, cascadable to 64 bits Single-chip 64-bit Generate Mode Separate system and m em ory buses On-chip pipeline latch with external control

BOSCH ME 7.8.8

Contextual Info: Freescale Semiconductor MPC5604BCRM Rev. 8.2, 09/2013 MPC5604B/C Microcontroller Reference Manual This is the MPC5604B/C Reference Manual set consisting of the following files: • MPC5604B/C Reference Manual Addendum MPC5604B/CRMAD , Rev. 2 • MPC5604B/C Reference Manual (MPC5604B/CRM), Rev. 8

C1995

Abstract: DP8402A DP8402AV DP8403 DP8404 DP8405 V68A SN74ALS632
Contextual Info: August 1989 DP8402A DP8403 DP8404 DP8405 32-Bit Parallel Error Detection and Correction Circuits EDAC’s General Description The DP8402A DP8403 DP8404 and DP8405 devices are 32-bit parallel error detection and correction circuits (EDACs) in 52-pin DP8402A and DP8403 or 48-pin DP8404

Contextual Info: Mobile 3rd Generation Intel Core Processor Family, Mobile Intel® Pentium® Processor Family, and Mobile Intel® Celeron® Processor Family Datasheet, Volume 1 of 2 June 2013 Document Number: 326768-006 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

at90can32-16au

Abstract: MOB2 module AT90CAN128 AT90CAN32 AT90CAN64 SP12 SP13 SP14 SP15 ni 400 le
Contextual Info: Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • • • – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers

PM7322

Abstract: PMC-940904
Contextual Info: PMC-Sierra, Inc. PM7322 RCMP APPLICATION NOTE ISSUE 1 PROGRAMMING THE RCMP VC SEARCH TABLE PM7322 PROGRAMMING THE RCMP VC SEARCH TABLE Issue 1: January 30, 1996 PMC-Sierra, Inc. 8501 Commerce Court, Burnaby, BC Canada V5A 4N3 604 668 7300 Proprietary and Confidential

LGA 1155 Socket PIN diagram

Abstract: LGA 1155 PIN diagram LGA 1155 pin out lga1155 pin diagram E3-1275 intel LGA 1155 PIN diagram 1155 PINmap lga1155 land E3-1260L CATERR Catastrophic Error
Contextual Info: Intel Xeon® Processor E3-1200 Family Datasheet, Volume 1 This is Volume 1 of 2 June 2011 Document Number: 324970-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS

UT8R2M39

Abstract: UT8R4M39 UT8R1M39 DQ380 10206 UT8ER1M39 PWR50
Contextual Info: Standard Products UT8R1M39 40Megabit SRAM MCM UT8R2M39 80Megabit SRAM MCM UT8R4M39 160Megabit SRAM MCM Preliminary Data Sheet December 9, 2010 www.aeroflex.com/memories FEATURES ‰ 20ns Read, 10ns Write maximum access times available ‰ Functionally compatible with traditional 1M, 2M, or 4M x

LGA 1155 Socket PIN diagram

Abstract: socket lga 1156 pinout LGA 1156 PIN OUT diagram Socket 1156 VID pinout INTEL Core i5 760 LGA 1156 Socket diagram INTEL Core i7 860 i7-870 Processor LGA 1156 PIN diagram i7 800
Contextual Info: Intel Core i7-800 and i5-700 Desktop Processor Series Datasheet – Volume 1 This is volume 1 of 2 July 2010 Document Number: 322164-004 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

tilex

Abstract: i7-600 Mobile GFX 2BA
Contextual Info: Intel Core i7-600, i5-500, i5-400 and i3-300 Mobile Processor Series Datasheet — Volume Two This is volume 2 of 2. Refer to Document Number 322812 for Volume 1 November 2010 Document Number: 322813-002 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED,

E-Node B

Abstract: hifn 8450 transceiver 4G LTE 4G 3G LTE WIMAX white paper tcam hifn-8450 4G TECHNOLOGY Enode hifn lzs
Contextual Info: White Paper Bandwidth Optimization and Protection for Wireless Backhaul Tien Shiah March 2009 White Paper Introduction As multimedia applications become ubiquitous on mobile phones, service providers will need to dramatically increase the bandwidth of their backhaul networks. This poses a challenge, as

9155HG

Abstract: ECDH-256 ECDSA-256 RGMII to SGMII Bridge SGMII RGMII bridge AES-XCBC-MAC-96 9150IG-K TCAM 2009 ecdsa MACsec
Contextual Info: Dual Port GigE Drop-In Security Processor Hifn Technology 915x Cost Effective, Low Power Solution Enables Easy Integration and Fast Time to Market Hardware Accelerated Suite B Support and Advanced Containment Delivers Maximum Security The 915x offers high performance, hardware accelerated Suite B support, and

A01013

Abstract: T89C51CC02 CAN20A apis T89C51
Contextual Info: Active Errata List • Timer 2 Baud Rate Generator Mode – Long Start Time • UART – RB8 Lost with JBC on SCON Register • CAN – CANCONCH Harmless Corruption • ADC – Interrupt During Idle Conversion • Flash/EEPROM – First Read After Load Disturbed

MAC7242

Abstract: freescale JTAG header MAC7242
Contextual Info: MAC7200RM Rev. 2 04/2007 MAC7200 Microcontroller Family Reference Manual Devices Supported: PAC7202 PAC7212 MAC7242 PAC7201 PAC7211 MAC7241 This document covers the following mask sets: MAC72x2 – 0M34A, 1M34A, 0M84D, 1M84D MAC72x1 – 0M19G MAC7200 Microcontroller Family Reference Manual, Rev. 2

at90can128 usart code example

Abstract: at90can128 SPI code example at90can128 output circuit example at90can128 can code example MOB2 module AT90CAN128 SP10 SP11 SP12 SP13
Contextual Info: 1. Features • High-performance, Low-power AVR 8-bit Microcontroller • Advanced RISC Architecture • • • • • • • • • – 133 Powerful Instructions – Most Single Clock Cycle Execution – 32 x 8 General Purpose Working Registers + Peripheral Control Registers

8051 Microcontrollers Hardware Manual

Abstract: atmel 8051 intel 83c154 INSTRUCTION SET atmel 8051 microcontroller datasheet atmel 8051 datasheet atmel 8051 microcontrollers hardware manual "Atmel 8051 Microcontrollers Hardware Manual" 8051 8051 atmel 8051 microcontrollers
Contextual Info: Atmel 8051 Microcontrollers Hardware Manual Table of Contents Section 1 The 8051 Instruction Set. 1-2 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.10 1.11 1.12 1.13 1.14 Program Status

MPC5603

Abstract: MPC5607 mpc5604b MPC5602 MPC5602B bosch me 7.3.1 0 261 207 609 pinout MPC560*D FlexCAN MPC5604BCRM MPC5604C
Contextual Info: Freescale Semiconductor MPC5604BCRM Rev. 8.1, 05/2012 MPC5604B/C Microcontroller Reference Manual by: Microcontroller Solutions Group This is the MPC5604B/C Reference Manual set consisting of the following files: • MPC5604B/C Reference Manual Addendum MPC5604B/CRMAD , Rev. 1

BD10

Abstract: BD12 BD13 PB10 PB12 dsp56002 boot dsp56001
Contextual Info: SECTION 5 PORT B MOTOROLA 5-1 SECTION CONTENTS 5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 5.2 GENERAL PURPOSE I/O CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . 5-4 5.3 HOST INTERFACE HI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-10