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    36AE Search Results

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    Vishay Semiconductors

    Vishay Semiconductors SMCJ36A-E3-9AT

    TVS DIODE 36VWM 58.1VC DO214AB
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    DigiKey () SMCJ36A-E3-9AT Digi-Reel 8,440 1
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    SMCJ36A-E3-9AT Cut Tape 8,440 1
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    SMCJ36A-E3-9AT Reel 3,500 3,500
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    Vishay Semiconductors SMCJ36A-E3-57T

    TVS DIODE 36VWM 58.1VC DO214AB
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    DigiKey () SMCJ36A-E3-57T Cut Tape 4,570 1
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    SMCJ36A-E3-57T Reel 4,250 850
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    Vishay Semiconductors SMA5J36A-E3-61

    TVS DIODE 36VWM 58.1VC DO214AC
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    DigiKey () SMA5J36A-E3-61 Cut Tape 3,540 1
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    SMA5J36A-E3-61 Digi-Reel 3,540 1
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    SMA5J36A-E3-61 Reel 1,800 1,800
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    Vishay Semiconductors 1.5SMC36A-E3-9AT

    TVS DIODE 30.8VWM DO214AB
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    DigiKey () 1.5SMC36A-E3-9AT Cut Tape 2,402 1
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    1.5SMC36A-E3-9AT Digi-Reel 2,402 1
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    Vishay Semiconductors SA36A-E3-54

    TVS DIODE 36VWM 58.1VC DO204AC
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    DigiKey SA36A-E3-54 Cut Tape 2,026 1
    • 1 $0.23
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    36AE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: Preliminary GS8342R08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus


    Original
    GS8342R08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, GS834x36E-300T. GS8342R08/09/18/36AE-333/300250/200/167 GS8342RxxA PDF

    Contextual Info: Preliminary GS8672Q18/36AE-333/300/250/200 72Mb SigmaQuad-II Burst of 2 ECCRAM™ 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–200 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • On-Chip ECC with virtually zero SER


    Original
    GS8672Q18/36AE-333/300/250/200 165-Bump 144Mb 165-bump, GS8672Q36AE-300T. 8672QxxAE PDF

    Contextual Info: GS8342R08/09/18/36AE-333/300/250/200/167 36Mb SigmaCIO DDR-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    GS8342R08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, 144Mbiver GS8342RxxA PDF

    Contextual Info: GS8342S08/09/18/36AE-250/200/167 250 MHz–167 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 SigmaSIO DDR-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Clocking and Addressing Schemes • Simultaneous Read and Write SigmaSIO™ Interface • JEDEC-standard pinout and package


    Original
    GS8342S08/09/18/36AE-250/200/167 165-Bump 165-bump, PDF

    Contextual Info: Preliminary GS8342D08/09/18/36AE-333/300/250/200/167 36Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342D08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, 144Mb GS834x36AE-300T. GS8342DxxA PDF

    Contextual Info: GS8342Q08/09/18/36AE-278/250/200/167 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–278 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb SigmaQuad-II Burst of 2 SRAM Features Clocking and Addressing Schemes • Simultaneous Read and Write SigmaQuad Interface


    Original
    GS8342Q08/09/18/36AE-278/250/200/167 165-Bump 165-bump, GS8342QxxA PDF

    Contextual Info: GS8342T08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaCIO DDR-II Burst of 2 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaCIO Interface • Common I/O bus • JEDEC-standard pinout and package


    Original
    GS8342T08/09/18/36AE-300M 165-Bump 165-bump, 144Mb GS8342T08AE-300M GS8342T09AE-300M GS8342T18AE-300M GS8342T36AE-300M 165-Pin PDF

    Contextual Info: GS8342D08/09/18/36AE-333/300/250/200/167 36Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342D08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, 144Mb GS8342DxxA PDF

    Contextual Info: GS8342Q08/09/18/36AE-250M 165-Bump BGA Military Temp 36Mb SigmaQuad-II Burst of 2 SRAM 250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-250M 165-Bump 165-bump, 144Mb GS8342Q36AE-250MT. GS8342QxxA PDF

    Contextual Info: Preliminary GS8342Q08/09/18/36AE-300/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-300/250/200/167 165-Bump 165-bump, 144Mb 9/18/36AE-300/250/200/167 GS8342QxxA PDF

    Contextual Info: GS8342Q08/09/18/36AE-250M 165-Bump BGA Military Temp 36Mb SigmaQuad-II Burst of 2 SRAM 250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-250M 165-Bump 165-bump, 144Mb GS8342Q36AE-250MT. GS8342QxxA PDF

    Contextual Info: Preliminary GS8672T18/36AE-333/300/250/200 72Mb SigmaDDR-II Burst of 2 ECCRAM™ 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–200 MHz 1.8 V VDD 1.8 V and 1.5 VDDQ Features Clocking and Addressing Schemes • On-Chip ECC with virtually zero SER


    Original
    GS8672T18/36AE-333/300/250/200 165-Bump 144Mb 165-bump, GS8672TxxAE PDF

    GS8342Q36AGE-167

    Abstract: GS8342Q18AGE-167 GS8342Q18AGE-250 GS8342Q36AE-250 GS8342Q18AE-250 GS8342Q36AE-167 GS8342Q36AE-200 GS8342Q09AE-250
    Contextual Info: Preliminary GS8342Q08/09/18/36AE-250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–250 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-250/200/167 165-Bump 165-bump, GS8342QxxA GS8342Q36AGE-167 GS8342Q18AGE-167 GS8342Q18AGE-250 GS8342Q36AE-250 GS8342Q18AE-250 GS8342Q36AE-167 GS8342Q36AE-200 GS8342Q09AE-250 PDF

    Contextual Info: GS8342T08/09/18/36AE-333/300/250/200/167 36Mb SigmaDDR-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaDDR-II™ Interface • Common I/O bus • JEDEC-standard pinout and package • Double Data Rate interface


    Original
    GS8342T08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, GS8342TxxA PDF

    Contextual Info: Preliminary GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package


    Original
    GS8342S08/09/18/36AE-333/300/250/200/167 165-Bump 8342SxxA PDF

    GS8342Q36AGE-167

    Abstract: GS8342Q36AGE-250 GS8342Q18AGE-250 GS8342Q36AGE-250I GS8342Q09AE-250 GS8342Q36AE-200 GS8342Q36AE-250 GS8342Q18AE-250 GS8342Q18AE-200 GS8342Q36AE
    Contextual Info: GS8342Q08/09/18/36AE-278/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–278 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-278/250/200/167 165-Bump 165-bump, GS8342QxxA GS8342Q36AGE-167 GS8342Q36AGE-250 GS8342Q18AGE-250 GS8342Q36AGE-250I GS8342Q09AE-250 GS8342Q36AE-200 GS8342Q36AE-250 GS8342Q18AE-250 GS8342Q18AE-200 GS8342Q36AE PDF

    GS8342S36AE-167

    Abstract: GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300 GS8342S18AGE-250 GS8342S18AE-167
    Contextual Info: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package


    Original
    GS8342S08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, 8342SxxA GS8342S36AE-167 GS8342S36AE-200 GS8342S36AE-250 GS8342S36AE-300 GS8342S18AGE-250 GS8342S18AE-167 PDF

    Contextual Info: GS8342Q08/09/18/36AE-278/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–278 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-278/250/200/167 165-Bump 165-bump, 144Mb GS8342QxxA PDF

    Contextual Info: Preliminary GS8342Q08/09/18/36AE-300/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-300/250/200/167 165-Bump 165-bump, 144Mb GS8342x36E-200T. GS8342QxxA PDF

    144MB

    Contextual Info: GS8342D08/09/18/36AE-300M 165-Bump BGA Military Temp 36Mb SigmaQuad-II Burst of 4 SRAM 300 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • Military Temperature Range • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342D08/09/18/36AE-300M 165-Bump 165-bump, 144Mb GS8342D36AE-300MT. GS8342DxxA PDF

    Contextual Info: GS8342S08/09/18/36AE-333/300/250/200/167 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O 36Mb Burst of 2 DDR SigmaSIO-II SRAM 165-Bump BGA Commercial Temp Industrial Temp Features • Simultaneous Read and Write SigmaSIO Interface • JEDEC-standard pinout and package


    Original
    GS8342S08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, PDF

    Contextual Info: Preliminary GS8672D18/36AE-333/300/250/200 72Mb SigmaQuad-II Burst of 4 ECCRAM™ 165-Bump BGA Commercial Temp Industrial Temp 333 MHz–200 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features Clocking and Addressing Schemes • On-Chip ECC with virtually zero SER


    Original
    GS8672D18/36AE-333/300/250/200 165-Bump 144Mb 165-bump, GS8672D36AE-300T. 8672DxxAE PDF

    Contextual Info: GS8342Q08/09/18/36AE-278/250/200/167 36Mb SigmaQuad-II Burst of 2 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–278 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342Q08/09/18/36AE-278/250/200/167 165-Bump 165-bump, 144Mb GS8342QxxA PDF

    GS8342D18AGE-250

    Abstract: GS8342D18AE-250 GS8342D18AGE-200 GS8342D08AE-167 GS8342D08AE-200 GS8342D08AE-250 GS8342D08AE-300
    Contextual Info: Preliminary GS8342D08/09/18/36AE-333/300/250/200/167 36Mb SigmaQuad-II Burst of 4 SRAM 165-Bump BGA Commercial Temp Industrial Temp 167 MHz–333 MHz 1.8 V VDD 1.8 V and 1.5 V I/O Features • Simultaneous Read and Write SigmaQuad Interface • JEDEC-standard pinout and package


    Original
    GS8342D08/09/18/36AE-333/300/250/200/167 165-Bump 165-bump, GS8342DxxA GS8342D18AGE-250 GS8342D18AE-250 GS8342D18AGE-200 GS8342D08AE-167 GS8342D08AE-200 GS8342D08AE-250 GS8342D08AE-300 PDF