365PS Search Results

hel52

Contextual Info: SY10EL52 SY100EL52 FINAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • ■ ■ ■ DESCRIPTION 365ps propagation delay 2.0GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL52 are differential data, differential

Contextual Info: « SY10EL52 SY100EL52 DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 365ps propagation delay 2.0GHz toggle frequency Internal 75K£2 input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

E452

Contextual Info: * SY10EL52 SY100EL52 DIFFER ENTIA L DATA AND C LO C K D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 365ps propagation delay 2.0GHz toggle frequency Internal 75Ki2 input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

E452

Abstract: SY100EL52 SY100EL52ZC SY10EL52 SY10EL52ZC SY10EL52ZCTR
Contextual Info: DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • ■ ■ ■ DESCRIPTION 365ps propagation delay 2.0GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL52 are differential data, differential clock D flip-flops. These devices are functionally

MAX9401

Abstract: MAX9401EGJ MAX9401EHJ MAX9404 MAX9404EGJ MAX9404EHJ
Contextual Info: 19-2245; Rev 0; 10/01 KIT ATION EVALU E L B A AVAIL Quad ECL/PECL Differential Buffers/Receivers Features ♦ Differential Double-Swing ECL/PECL Outputs ♦ Input Compatible with LVECL/LVPECL ♦ Guaranteed 900mV Differential Output at 3.0GHz Clock Rate ♦ 365ps Propagation Delay in Asynchronous Mode

Contextual Info: « SY10EL52 SY100EL52 DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 365ps propagation delay 2.0GHz toggle frequency Internal 75K£2 input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

tl 494 equivalent

Abstract: E452 SY100EL52 SY100EL52ZC SY10EL52 SY10EL52ZC
Contextual Info: « PL1MINARY SY10EL52 SY100EL52 DIFFERENTIAL DATA & CLOCK D FLIP-FLOP SYNERGY S E M IC O N D U C TO R FEATURES DESCRIPTION • 365ps propagation delay The SY10EL/100EL52 are differential data, differential clock D flip-flops with reset. These devices are functionally

E452

Abstract: SY100EL52 SY100EL52ZC SY10EL52 SY10EL52ZC SY10EL52ZCTR 21 AC
Contextual Info: SY10EL52 SY100EL52 FINAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • ■ ■ ■ DESCRIPTION 365ps propagation delay 2.0GHz toggle frequency Internal 75KΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL52 are differential data, differential

Contextual Info: *SYNERGY PLIMINARY SY10EL52 SY100EL52 DIFFERENTIAL DATA & CLOCK D FLIP-FLOP SEMICONDUCTOR DESCRIPTION FEATURES • 365ps propagation delay The SY10EL/100EL52 are differential data, differential clock D flip-flops with reset. These devices are functionally

Contextual Info: DIFFERENTIA! SYNERGY 5 Y i O E I.52 DATA AN D SY ! 0 0 E L 52 C L O C K 0 F l 1P- FL0P S E M IC O N D U C TO R DESCRIPTION FEATURES 365ps propagation delay 2.0GHz toggle frequency Internal 75K12 input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package

HEL52

Abstract: xel52 SY10EL52ZCTR E452 SY100EL52 SY100EL52ZC SY100EL52ZCTR SY10EL52 SY10EL52ZC
Contextual Info: SY100EL52 DESCRIPTION FEATURES • ■ ■ ■ SY10EL52 SY100EL52 SY10EL52 DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP Micrel, Inc. 365ps propagation delay 2.0GHz toggle frequency Internal 75kΩ input pull-down resistors Available in 8-pin SOIC package The SY10/100EL52 are differential data, differential

MAX940

Contextual Info: 19-2245; Rev 0; 10/01 KIT ATION EVALU E L B A AVAIL Quad ECL/PECL Differential Buffers/Receivers Features ♦ Differential Double-Swing ECL/PECL Outputs ♦ Input Compatible with LVECL/LVPECL ♦ Guaranteed 900mV Differential Output at 3.0GHz Clock Rate ♦ 365ps Propagation Delay in Asynchronous Mode

Contextual Info: 2Gb: x8, x16 DDR3L-RS SDRAM Description 1.35V DDR3L-RS SDRAM MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description Features DDR3L-RS SDRAM 1.35V is a low current self refresh version, via a TCSR feature, of the DDR3L SDRAM

MT41K512M8RH

Abstract: 901KB MT41K256M16 MT41K512M8RH-125 256M16 A2 SMD CODE MARKING MT41K512M8RH-125M DDR3L
Contextual Info: 4Gb: x4, x8, x16 DDR3L-RS SDRAM Description 1.35V DDR3L-RS SDRAM MT41K1G4 - 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description Features • Self refresh temperature SRT • Automatic self refresh (ASR)

MT41K128M16

Abstract: MT41K128M1 TIS87 AC135 MT41K256 MT41K128M 140-RT-T MT41K
Contextual Info: 2Gb: x8, x16 DDR3Lm SDRAM Description 1.35V DDR3Lm SDRAM MT41K256M8 – 32 Meg x 8 x 8 banks MT41K128M16 – 16 Meg x 16 x 8 banks Description Features • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C; See SRT

Contextual Info: *SYNERGY SY10EL52 SY100EL52 DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP SEMICONDUCTOR DESCRIPTION FEATURES The S Y 10/100E L52 are d ifferential data, differential c lo c k D flip - flo p s w ith re s e t. T h e s e d e v ic e s a re fu n ction a lly e q u iva le nt to the E452 devices, with higher

s1866

Contextual Info: 4Gb: x4, x8, x16 DDR3L-RS SDRAM Description 1.35V DDR3L-RS SDRAM MT41K1G4 - 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description Features • Self refresh temperature SRT • Automatic self refresh (ASR)

MT41K512M8RH-125

Abstract: 256M16
Contextual Info: 4Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K1G4 – 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C

MAX9316

Abstract: MAX9316EUP MAX9316EWP MC100LVEL14
Contextual Info: 19-2237; Rev 0; 10/01 KIT ATION EVALU E L B AVAILA 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Driver Features ♦ Guaranteed 400mV Differential Output at 1.5GHz ♦ Selectable Single-Ended or Differential Input ♦ 130ps max Part-to-Part Skew at +25°C

Contextual Info: 19-2245; Rev 0; 10/01 KIT ATION EVALU E L B A AVAIL Quad ECL/PECL Differential Buffers/Receivers Features ♦ Differential Double-Swing ECL/PECL Outputs The MAX9401 has high-impedance open input and the MAX9404 has an integrated 100Ω differential input

Contextual Info: 4Gb: x4, x8, x16 DDR3L SDRAM Description 1.35V DDR3L SDRAM MT41K1G4 – 128 Meg x 4 x 8 banks MT41K512M8 – 64 Meg x 8 x 8 banks MT41K256M16 – 32 Meg x 16 x 8 banks Description • TC of 0°C to +95°C – 64ms, 8192-cycle refresh at 0°C to +85°C – 32ms at +85°C to +95°C

Contextual Info: FEATURES APPLICATIONS Power semiconductor module protection - High pulse and rms current – Multiple Leads Power Semiconductor circuits – Resonant circuits – Induction Heaters – Switching power supplies Operating Temperature Range Capacitance Tolerance

154PSB202K2

Contextual Info: FEATURES APPLICATIONS Power semiconductor module protection - High pulse and rms current – Multiple Leads Power Semiconductor circuits – Resonant circuits – Induction Heaters – Switching power supplies Operating Temperature Range Capacitance Tolerance

154PSB202K2

Contextual Info: FEATURES APPLICATIONS Power semiconductor module protection - High pulse and rms current – Multiple Leads Power Semiconductor circuits – Resonant circuits – Induction Heaters – Switching power supplies Operating Temperature Range Capacitance Tolerance