30MBIT Search Results

Contextual Info: LF4430 30-Mbit Video Memory / FIFO DEVICES INCORPORATED Preliminary Datasheet FRAME MEMORY Features 30Mbit 31,046,400 bit memory density 150MHz Max clock rate Separate independent Read and Write ports: • Supports concurrent read/write transactions Selectable Memory Organization:

LF4460

Abstract: depth expansion fifo pointer read write "Frame rate conversion"
Contextual Info: LF4430 30-Mbit Video Memory / FIFO DEVICES INCORPORATED Preliminary Datasheet FRAME MEMORY Features 30Mbit 31,046,400 bit memory density 150MHz Max clock rate Independent Read and Write ports: • Supports simultaneous read/write operations Selectable Memory Organization:

microread

Abstract: 64 QAM modulator demodulator HD49429F uncorrectable errors FEC soft 256qam HD49430F PQFP-100 equalizer algorithm multipath qam circuit CLK10M
Contextual Info: HD49430F Preliminary Specification Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream

hd-SDI driver

Abstract: HD-SDI LF44xx SDI SERIALIZER hd-SDI deserializer LF3312 LF3324 LF4460 HD-SDI camera parallel to HD-SDI
Contextual Info: DEVICES INCORPORATED Introducing - HD Frame Memory FRAME MEMORY Spend more time on product differentiation and less time juggling frames of video. Imagine a full-frame HDTV frame store solution in a single, tiny chip. Add a simple, easy to use SRAM interface and flexible addressing

BZx85 12v

Abstract: BZX85 C27 transistor c 6073 ISO485 ISO485P RS-422A RS-432-A
Contextual Info: ISO485 ISO 485 Isolated RS-485 DIFFERENTIAL BUS TRANSCEIVER FEATURES DESCRIPTION ● RS-485 AND RS-422 COMPATIBLE ● 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN The ISO485 differential, isolated bus transceiver uses Burr-Brown’s capacitively coupled isolation technology to provide high-speed, low cost bus isolation.

14 pin 2x7, 2mm header

Abstract: standard 6-pin JTAG header JTAG 2mm 6 pin JTAG header USB 2 SPI 1.8V 5V jtag 6 pin JTAG CONNECTOR Tms 1300 Xilinx usb jtag cable 6-pin JTAG header
Contextual Info: JTAG HS1 Programming Cable for Xilinx FPGAs Revision: June 10, 2011 1300 Henley Court | Pullman, WA 99163 509 334 6306 Voice and Fax Overview The JTAG-HS1 programming cable is a highspeed programming solution for Xilinx FPGAs. It is fully compatible will all Xilinx tools, and can be

Contextual Info: JTAG-HS2 Programming Cable for Xilinx FPGAs Revision: July 24, 2012 1300 Henley Court | Pullman, WA 99163 509 334 6306 Voice and Fax Overview The Joint Test Action Group (JTAG)-HS2 programming cable is a high-speed programming solution for Xilinx fieldprogrammable gate arrays (FPGAs). The cable

Programmers Guide for High Speed FTCSPI DLL

Abstract: ft4232 FT4232H ftd2xx.dll AN111 ftdi FT2232H FTHA Spirea FT2232D ft2232h spi
Contextual Info: Future Technology Devices International Ltd. Application Note AN_111 Programmers Guide for High Speed FTCSPI DLL Document Reference No.: FT_000112 Version 1.1 Issue Date: 2009-03-18 This document provides details of the function calls required when using the High Speed

diode IN4048 equivalent

Abstract: RS-432-A BZx85 12v BZX85 C27 ISO485 ISO485P RS-422A in404 ptc circuit controller rs 432
Contextual Info: ISO485 ISO 485 Isolated RS-485 DIFFERENTIAL BUS TRANSCEIVER FEATURES DESCRIPTION ● RS-485 AND RS-422 COMPATIBLE ● 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN The ISO485 differential, isolated bus transceiver uses Burr-Brown’s capacitively coupled isolation technology to provide high-speed, low cost bus isolation.

idct vhdl code

Abstract: iso 13818-2 transport stream huffman encoding and decoding audio signal using VHDL Amphion Semiconductor CS6651 fpga "motion detection" verilog for 8 point dct in xilinx vhdl code for demultiplexer huffman encoding and decoding using VHDL
Contextual Info: CS6651 TM MPEG-2 Video Decoder for FPGA Virtual Components for the Converging World The CS6651 MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific virtual component ASVC is for standard

OD125

Abstract: photosensors f4601 F5503
Contextual Info: E2V0043-37-X1 ¡ electronic components OD125 PHOTOSENSORS OD125 InGaAs PIN Photodiode for Optical Communications GENERAL DESCRIPTION The OD125 is designed as a receiver AMP for 30-Mbit digital signals. It features a PIN photodiode and AMP built into a TO-18 metal package.

Contextual Info: OKI electronic components OP125_ InGaAs PIN Photodiode for Optical Communications GENERAL DESCRIPTION The OD125 is designed as a receiver AMP for 30-Mbit digital signals. It features a PIN photodiode and AMP built into a TO-18 metal package. FEATURES

Contextual Info: B U R R -B R O W N IS0485 • ■=» «=» I Isolated RS-485 DIFFERENTIAL BUS TRANSCEIVER FEATURES DESCRIPTION • RS-485 AND RS-422 COMPATIBLE The IS0485 differential, isolated bus transceiver uses Burr-Brown’s capacitively coupled isolation technol­

Contextual Info: HD49430F Preliminary Specification HITACHI Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream

CS6651

Abstract: vhdl code for 4 channel dma controller huffman decoder verilog vhdl code for demultiplexer huffman encoding and decoding using VHDL
Contextual Info: CS6651 TM MPEG-2 Video Decoder for FPGA Virtual Components for the Converging World The CS6651 MPEG2 decoder is designed to provide high performance solutions for a broad range of motion image applications. This highly integrated application specific virtual component ASVC is for standard

Xilinx jtag serial

Contextual Info: Virtex-II Pro Configuration New Products New Configuration Options for Virtex-II Pro Configure Virtex-II Pro FPGAs – and load embedded processor software – using the System ACE pre-engineered configuration solutions. by Frank L. Toth Marketing Manager, Configuration Solutions Division

FT232H

Abstract: Serial Interface Basics FT1248 Dynamic Parallel/Serial Interface Basics AppNotes FT1248 parallel serial interface
Contextual Info: Future Technology Devices International Ltd. FT1248 Dynamic Parallel/Serial Interface Basics Application Note AN_167 Document Reference No.: FT_000390 Version 1.0 Issue Date: 2011-02-16 This application note describes the functionality of the new FT1248 mode interface developed

AN-109 equivalent

Abstract: FTCI2C AN-109 reference 3 FT2232D ftd2xx.dll FT4232H FT2232H ft4232 FT2232 an109
Contextual Info: Future Technology Devices International Ltd. Application Note AN_109 Programming Guide for High Speed FTCI2C DLL Document Reference No.: FT_000110 Version 1.2 Issue Date: 2009-07-02 This document provides details of the function calls required when using the High

diode IN4048 equivalent

Abstract: PTC 1k thermistor conversion table
Contextual Info: ISO485 ISO 485 Isolated RS-485 DIFFERENTIAL BUS TRANSCEIVER FEATURES DESCRIPTION ● RS-485 AND RS-422 COMPATIBLE ● 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN The ISO485 differential, isolated bus transceiver uses Burr-Brown’s capacitively coupled isolation technology to provide high-speed, low cost bus isolation.

HD4942

Abstract: qam circuit
Contextual Info: HD49430F Preliminary Specification HITACHI Rev. 2 April 1, 1998 General Description HD49430F is a highly integrated Downstream Processor optimized for applications such as Cable Modems and Set-top boxes and forms a complete and optimal solution with its companion HD49429F Upstream

Contextual Info: SSI 34P3400 ¿ ik o n s y s te m 30 Mbit/s Read Channel w/Adaptive Threshold Qualifier s A TDK Group/Company Advance Information January 1995 DESCRIPTION FEATURES The SSI 34P3400 device is a high performance BiCMOS single chip read channel 1C that contains all

LF44xx

Abstract: LF4460 full hd video processor LF4415 "Frame rate conversion"
Contextual Info: LF4460 LF4430 LF4415 PRELIMINARY Video Memory / FIFO FRAME MEMORY Features Selectable I/O VDD = 1.8V, 2.5V, 3.3V Selectable Core VDD = 1.8V, 2.5V, 3.3V 172 ball FBGA package 15 x 15 x 1.4mm Depth expansion is supported for Multi-frame HDTV, Multiframe SDTV, and other formats:

Contextual Info: ISO485 I SO 485 Isolated RS-485 DIFFERENTIAL BUS TRANSCEIVER FEATURES DESCRIPTION ● RS-485 AND RS-422 COMPATIBLE ● 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN The ISO485 differential, isolated bus transceiver uses Burr-Brown’s capacitively coupled isolation technology to provide high-speed, low cost bus isolation.

OP125

Abstract: OD125
Contextual Info: OKI electronic com ponents O P 125 _ InGaAs PIN Photodiode for Optical Communications GEN ERAL DESCRIPTION The OD125 is designed as a receiver AMP for 30-Mbit digital signals. It features a PIN photodiode and AMP built into a TO-18 metal package.