30JAN200 Search Results

Contextual Info: 6 T H IS D R A W IN G IS U N P U B L IS H E D . RELEASED ALL C O P Y R IG H T BY TYCO E L E C T R O N IC S FOR P U B L IC A T IO N IN T E R N A T IO N A L R IG H T S RESERVED. C O R P O R A T IO N . A 4805 30JAN2009 1/ 0 8 5:03pm _ _ C:\Development\ADAMS\2mm HM\563612 0_1 - c.dwq

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. LOC REVISIONS DIST HJ - P LTR DESCRIPTION A2 A3 A4 A5 1 Doc change D02239-DOK51 to C-1462033-2 change marking REVISED PER ECO-11-005150 REVISED PER ECO-13-009556 4 3 2 DWN DATE HD HD HMR AK UKo UKo RK UKo 30Jan2006 28Jul2006

Contextual Info: THIS DRAWING IS A CONTROLLED DOCUMENT. LOC REVISIONS DIST HJ - P LTR DESCRIPTION A4 A5 A6 A7 1 3 Doc change D02309-DOK51 to C-1462034-2 change marking REVISED PER ECO-11-005150 REVISED PER ECO-13-009556 4 DWN DATE HD HD HMR AK UKo UKo RK UKo 30Jan2006 28Jul2006

T568A

Abstract: T568B AMP Tyco JT 2,8
Contextual Info: THIS £ L DRAWIN G IS UNPUBLISHED. BY C O P Y R I G H T 20 RELEASED TYCO ELECTRONICS CORPORATION. FOR ALL 20 PUBLICATION R 1G H T S LOC R E V ISIONS DIST RESERVED. LTR DESCRIPTION DATE APVD DWN E C O - 06 - 0 2 5 5 9 4 30JAN2007 JM SH REV, 29MAY2008 JB SH

Contextual Info: SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com SCBS807B – OCTOBER 2005 – REVISED JANUARY 2006 FEATURES • • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication

LT1007

Abstract: OP-27 OPA2227 OPA2228 OPA227 OPA228 OPA4227 OPA4228
Contextual Info: OPA227 OPA2227 OPA4227 OPA 4 227 OPA 227 OPA 2 227 OPA 42 OPA2 27 OPA228 27 OPA2 227 OPA2228 OPA4228 SBOS110A – MAY 1998 – REVISED JANUARY 2005 High Precision, Low Noise OPERATIONAL AMPLIFIERS FEATURES DESCRIPTION ● LOW NOISE: 3nV/√Hz ● WIDE BANDWIDTH:

Contextual Info: DA DAC8812 C8 812 www.ti.com SBAS349B – AUGUST 2005 – REVISED FEBRUARY 2007 Dual, Serial Input 16-Bit Multiplying Digital-to-Analog Converter FEATURES DESCRIPTION • • • The DAC8812 is a dual, 16-bit, current-output digital-to-analog converter DAC designed to

FL-101

Abstract: FLASHLINK flashlink FL-101B ST has a specific connector and pinout 74VHC240 PSD813F pcb design lab manual jtag cable Schematic PSDSOFT EXPRESS
Contextual Info: FL_101 USER MANUAL FlashLink User Manual CONTENTS • Introduction on next page January 2002 1/3 FlashLink User Manual Features ❏ ❏ ❏ ❏ ❏ Overview Allows PC parallel port to communicate with PSD813F via PSDsoft Provides interface medium for JTAG

Contextual Info: DAC8806 DA C8 806 www.ti.com SBAS385B – APRIL 2006 – REVISED FEBRUARY 2008 14-Bit, Parallel Input Multiplying Digital-to-Analog Converter FEATURES APPLICATIONS • • • • • • • • • • • 1 2 • • • • • • • ±0.5 LSB DNL ±1 LSB INL

Contextual Info: DAC DAC 761 761 DAC7615 5 5 Quad, Serial Input, 12-Bit, Voltage Output DIGITAL-TO-ANALOG CONVERTER FEATURES APPLICATIONS ● LOW POWER: 20mW ● UNIPOLAR OR BIPOLAR OPERATION ● PROCESS CONTROL ● SETTLING TIME: 10µs to 0.012% ● ATE PIN ELECTRONICS

marking LN4

Contextual Info: ADS7870 SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005 12ĆBIT, 52ĆkSPS, DATA ACQUISITION SYSTEM WITH ANALOGĆTOĆDIGITAL CONVERTER, MUX, PGA, AND REFERENCE FEATURES DESCRIPTION D PGA Gains: 1, 2, 4, 5, 8, 10, 16, 20 V/V D Programmable Input Up to 4-Channel

Contextual Info: DAC8871 DA C8 871 www.ti.com . SBAS396A – JUNE 2007 – REVISED JUNE 2008 16-Bit, Single-Channel, ±18V Output Unbuffered , Ultra-Low Power, Serial Interface

1P1G126QDBVRQ1

Contextual Info: SN74LVC1G126-Q1 www.ti.com. SCES467B – JULY 2003 – REVISED APRIL 2008 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

Contextual Info: UCC5621 27 - Line SCSI Terminator With Split Reverse Disconnect FEATURES DESCRIPTION • Complies with SCSI, SCSI-2, SCSI-3, SPI and FAST-20 Ultra Standards UCC5621 provides 27 lines of active termination for a SCSI (Small Computer Systems Interface) parallel bus. The SCSI standard recommends active termination at both ends of the cable.

VFBGA44

Abstract: M58WR016KL M58WR016KU M58WR032KL M58WR032KU ADQ12
Contextual Info: M58WR016KU M58WR016KL M58WR032KU M58WR032KL 16- or 32-Mbit x16, Mux I/O, Multiple Bank, Burst 1.8 V supply Flash memories Data Brief Features • Supply voltage – VDD = 1.7 V to 2 V for Program, Erase and Read – VDDQ = 1.7 V to 2 V for I/O buffers – VPP = 9 V for fast Program

RHFL4913A

Contextual Info: RHFL4913A Rad-hard adjustable positive voltage regulator Datasheet - production data provide 2 A of maximum current in FLAT-16 package 3 A in the SMD5C package from an input voltage ranging from 3 V to 12 V, with a typical dropout voltage of 350 mV. )/$7

Contextual Info: STS8DNF3LL Dual N-channel 30 V, 0.017 Ω typ., 8 A, STripFET II Power MOSFET in a SO-8 package Datasheet - production data Features Order code VDS RDS on max ID STS8DNF3LL 30 V 0.020 Ω 8A 5 • Optimal RDS(on) x Qg trade-off @ 4.5 V 8 • Conduction losses reduced

Contextual Info: M59PW016 16 Mbit 1Mb x16, Uniform Block 3V Supply LightFlash Memory NOT FOR NEW DESIGN FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ ■ MASK-ROM PIN-OUT COMPATIBLE SUPPLY VOLTAGE – VCC = 2.7 to 3.6V for Read – VPP = 11.4 to 12.6V for Program

Contextual Info: STCF03 High Power white LED driver with I2C interface General features • Buck-boost dc/dc converter ■ Drives one power white LED up to 800mA from 2.7V to 5.5V in QFN ■ Drives one power white LED up to 800mA from 3.3V to 5.5V in BGA ■ Efficient up to 92%

NCP21WF104J03RA

Abstract: QFN20 STCF03 STCF03PNR STCF03TBR VLF3012ST-4R7MR91
Contextual Info: STCF03 High power white LED driver with I²C interface Features • Buck-boost DC-DC converter ■ Drives one power white LED up to 800 mA from 2.7 V to 5.5 V in QFN ■ Drives one power white LED up to 800 mA from 3.3 V to 5.5 V in BGA ■ Efficient up to 92%

FB300

Abstract: M50FW080 PLCC32 TSOP32
Contextual Info: M50FW080 8 Mbit 1M x8, Uniform Block 3V Supply Firmware Hub Flash Memory FEATURES SUMMARY • ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE – VCC = 3V to 3.6V for Program, Erase and Read Operations – VPP = 12V for Fast Program and Fast Erase (optional)

80C31

Abstract: AN1422 PSD311 PSD312 PSD411A1 psd3xx psd4xx psd5xx Amd2901 Waferscale EPROM patents
Contextual Info: AN1422 APPLICATION NOTE Designing with Flash+PSD Memory CONTENTS Introduction on next page January 2002 1/3 Programmable Peripheral Application Note 048 Designing with Flash Memory Introduction Flash Memory has gained a wide popularity as a choice of use in embedded system

C05IE150HV

Abstract: JESD97 STC05IE150HV
Contextual Info: STC05IE150HV Emitter Switched Bipolar Transistor ESBT 1500 V - 5 A - 0.12 Ω Features PRELIMINARY DATA VCS ON IC RCS(ON) 0.6 V 5A 0.12 W • High voltage / high current Cascode configuration ■ Low equivalent on resistance ■ Very fast-switch, up to 150 kHZ

Contextual Info: OPA 4364 OPA 436 4 OPA2 364 OPA2 363 OPA 363 OPA363 OPA2363 OPA364 OPA2364 OPA4364 SBOS259B – SEPTEMBER 2002 – REVISED FEBRUARY 2003 1.8V, 7MHz, 90dB CMRR, SINGLE-SUPPLY, RAIL-TO-RAIL I/O OPERATIONAL AMPLIFIER FEATURES DESCRIPTION ● 1.8V OPERATION