2COE Search Results

XC4000E

Abstract: 3 taps filters
Contextual Info: Parallel Distributed Arithmetic FIR Filter December 30, 1998 Product Specification R Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: coregen@xilinx.com URL: www.xilinx.com Features • • • • • •

fir compiler v5

Abstract: ds534 DSP48 SRL16 XIP162 matched filter matlab codes fir compiler xilinx digital FIR Filter using distributed arithmetic MATLAB code for halfband filter fir compiler v4
Contextual Info: FIR Compiler v3.2 DS534 October 10, 2007 Product Specification Features General Description • Highly parameterizable drop-in module for Virtex , Virtex-E, Virtex-II, Virtex-II Pro, Virtex-4, The Xilinx LogiCORE™ IP FIR Compiler core provides a common interface for users to generate highly parameterizable, area-efficient high-performance FIR filters

Marvell PHY 88E3018 layout

Abstract: WPC8763 CX20549-12Z SC4D7U25V5KX-GP cx20561-12z 88E3018 AJ19 C4722 c547c MCP67
Contextual Info: 5 4 3 2 1 Tibet Block Diagram MAX8734A DDRII 667/800 Channel A AMD CPU NPT Processor Rev. G S1 package D SYSTEM DC/DC INPUTS DDRII Slot 0 DCBATOUT DDRII 667/800 Channel B DDRII Slot 1 SVIDEO/COMP HDCP PCIE x 1 CRT 1D2V_HT_S0 1D2V_CORE_S0 PCIE x 1/ USB2.0 LVDS Dual Channel

WPCE773L

Abstract: CX20561-14Z NVIDIA G92 MCP67-GP G1431F2U-GP nvidia mcp77 TPS51125 MCP67 G792SFUF-GP mcp77
Contextual Info: 5 4 3 2 1 SYSTEM DC/DC Astrosphere Block Diagram TPS51125 INPUTS DDRII 667/800 Channel A AMD CPU NPT Processor Rev. G S1G2 package D DDRII 667/800 Channel B OUTPUTS DDRII Slot 0 DCBATOUT DDRII +3VALW +5VALW D SYSTEM DC/DC Slot 1 TPS51116 7,8 3,4,5,6 INPUTS

fir compiler v5

Abstract: fir compiler xilinx XC6SLX150-2FGG484 Polyphase Filter Banks 90CLK fir compiler v4 digital FIR Filter VHDL code polyphase FIR filter interpolation matlaB simulink design FDATOOL verilog code for interpolation filter
Contextual Info: FIR Compiler v5.0 DS534 June 24, 2009 Product Specification Introduction Overview The Xilinx LogiCORE IP FIR Compiler core provides a common interface for users to generate highly parameterizable, area-efficient high-performance FIR filters utilizing either Multiply-Accumulate MAC or

digital FIR Filter using distributed arithmetic

Abstract: active filter module APPLICATION circuit diagram fir filters FIR FILTER implementation xilinx XC4000E
Contextual Info: Serial Distributed Arithmetic FIR Filter December 30, 1998 Product Specification R • • • Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: coregen@xilinx.com URL: www.xilinx.com Features • • • •

verilog code for fir filter using DA

Abstract: vhdl code for FFT 4096 point P6421 p4826 vhdl code for radix 2-2 parallel FFT 16 point FIR FILTER implementation on fpga VHDL code for polyphase decimation filter FDATOOL DSP48 spartan 6 VHDL code for polyphase decimation filter using D
Contextual Info: LogiCORE IP FIR Compiler v6.3 DS795 October 19, 2011 Product Specification Overview LogiCORE IP Facts The Xilinx LogiCORE IP FIR Compiler core provides a common interface for users to generate highly parameterizable, area-efficient high-performance FIR

GAP-CLOSE-PWR

Abstract: CX20561-14Z WPCE773L TPS51125 tps51125 kbc CX20561 cx2056 GC521 MCP77 WPCE773LA
Contextual Info: 5 4 3 2 1 SYSTEM DC/DC Astrosphere Block Diagram TPS51125 INPUTS DDRII 667/800 Channel A AMD CPU NPT Processor Rev. G S1G2 package D DDRII 667/800 Channel B OUTPUTS DDRII Slot 0 DCBATOUT DDRII +3VALW +5VALW D SYSTEM DC/DC Slot 1 TPS51116 7,8 3,4,5,6 INPUTS

KB3910SF

Abstract: CX20549-12Z CX20549 Marvell 88E1116 KB3910SF B4 nvidia mcp max8725 16x16 rgb led matrix MAX8760 foxconn
Contextual Info: 5 4 3 2 Project Code: 91.4F701.001 Project Name: Shiba PCB Number: 05234 Shiba Block Diagram FF+ NPT Processor Rev. F S1 package D SYSTEM DC/DC MAX8734A INPUTS DDRII 667 DDRII 667 Channel A AMD CPU 1 OUTPUTS Slot 0 DCBATOUT DDRII 667 DDRII 667 Channel B Slot 1

IRF32N50k

Abstract: IRF32N50 SWITCHING WELDING SCHEMATIC BY MOSFET AN-7536 IGBT ZVT Full bridge ZVT Full bridge transformer IGBT resonant converter for welding FQA28N50F FDH45N50F Welding topologies
Contextual Info: www.fairchildsemi.com AN-7536 FCS Fast Body Diode MOSFET for Phase-Shifted ZVS PWM Full Bridge DC/DC Converter Sampat Shekhawat, Mark Rinehimer and Bob Brockway Discrete Power Group, Fairchild Semiconductor Introduction Topology Description Efficiency, power density, reliability, and cost are

Contextual Info: VFB1012D Ultra-High-Precision Z-Foil Ball Grid Array BGA Surface-Mount Voltage Divider features • Temperature coefficient of resistance (TCR) – Absolute: ± 0.05 ppm/°C typical (0 °C to + 60 °C) – Tracking: 0.1 ppm/°C typical • Power coefficient of resistance (PCR) tracking (“∆R due to self heating”): 5 ppm at

transformer-less AC-DC converter

Abstract: SLAC audio compression transmission line model orcad pspice *74AS* spice models am79231 AMD AM3 Processor Functional AMD SLIC Am79202/03 PSPICE breakout 486DX
Contextual Info: WinSLAC Software User’s Guide 1999 The contents of this document are provided in connection with Advanced Micro Devices, Inc. “AMD” products. AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make

Polyphase Filter Banks

Abstract: non integer rate sampling rate converter verilog XC6SLX150-2FGG484 fir compiler v4 how example make fir filter in spartan 3 vhdl direct-form FIR Filter verilog polyphase system generator matlab ise Harris Microwave Semiconductor Division DS534 DSP48
Contextual Info: IP LogiCORE FIR Compiler v5.0 DS534 March 1, 2011 Product Specification Introduction LogiCORE IP Facts Table The Xilinx LogiCORE IP FIR Compiler core provides a common interface for users to generate highly parameterizable, area-efficient high-performance FIR filters