2B15 Search Results

2U36

Abstract: zener 2B1 2U18 EQUIVALENT OF zener 2b1 2u91 2U51 2U75 2U39 2U10 2U62
Contextual Info: I n ter n a tio n a l S e m ic o n d u c t o r I n c . 2B15 2U15 thru thru 2B150 2U150 TRANSIENT VOLTAGE SUPPRESSORS 12.1 to 121 VOLTS 250 W A TT PEAK PO W ER 0.5 W A T T S TE A D Y STATE o MAXIMUM RATINGS AND CHARACTERISTICS . 1 04 /. 140 Ratings at 25 °C am bient unless otherw ise specified

Contextual Info: SN74AVC32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES272C – APRIL 1999 – REVISED – AUGUST 1999 D D D D Member of the Texas Instruments Widebus+  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process UBT  (Universal Bus Transceiver)

Contextual Info: www.ti.com SN74ALVCHG162282 18-BIT TO 36-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES094D – FEBRUARY 1997 – REVISED OCTOBER 2004 FEATURES • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted

Contextual Info: SN74GTLPH32916 34-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS www.ti.com SCES380A – JANUARY 2002 – REVISED JUNE 2005 FEATURES • • • • • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches

Contextual Info: SN74GTLPH32912 36-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER www.ti.com FEATURES • • • • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, Clocked, and

Contextual Info: SN74ALVCH32501 36ĆBIT UNIVERSAL BUS TRANSCEIVER WITH 3ĆSTATE OUTPUTS SCES144E − OCTOBER 1998 − REVISED AUGUST 2003 D Member of the Texas Instruments D D D D D Bus Hold on Data Inputs Eliminates the Widebus+ Family UBT  Transceiver Combines D-Type

2B50UM

Abstract: 2b32 1B10UM
Contextual Info: Application Examples: Business equipment, wiring protection, lighting, appliances, control circuits, some motors and some electronic applications. Relatively long thermal trip delay but low magnetic trip point. UL508 Listed One Pole Standard Pack: 12 Weight:

E137938

Abstract: 1B10UM 125A13A
Contextual Info: One Pole Standard Pack: 12 Weight: 0.3A - 32A 1.8kg 3.97 lb. 40A - 63A 1.98kg (4.37 lb.) Two Pole Standard Pack: 6 Weight: 0.3A - 32A 1.8kg (3.97 lb.) 40A - 63A 1.98kg (4.37 lb.) Business equipment, wiring protection, lighting, appliances, control circuits, some

1A12

Abstract: 1A15 1A17 SN74ALVCH32501
Contextual Info: SN74ALVCH32501 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCES144B – OCTOBER 1998 – REVISED JUNE 1999 D D D D D Member of the Texas Instruments Widebus  Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process UBT  (Universal Bus Transceiver)

1B10

Abstract: SN74ALVCH16282
Contextual Info: SN74ALVCH16282 18-BIT TO 36-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS SCES036D – JULY 1995 – REVISED MARCH 2000 D D D D D D DBB PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family EPIC  (Enhanced-Performance Implanted CMOS) Submicron Process

Contextual Info: TRANSIENT VOLTAGE SUPPRESSORS 2 5 0 Vtt et t s BREAKDOWN VOLTAGE WORKING MAXIMUM 1>EAK MAXIMUM MAXIMUM REVERSE CLAMPJMG PSAK REVERSE LEAKAGE CURRENT VOLTAGE COEFFICIENT VOLTAGE of V „ v„«« V ., . {Volts} l.fttA J !,{A m p s J v I/ o ils ! IW 'C t PART

NS32081

Abstract: 2n01 32fx16 NS32FV16 NS32FV16-20 NS32FV16-25 NS32FX161 NS32FX161-15 NS32FX161-20 NS32FX164
Contextual Info: NS32FX161-15 NS32FX161-20 NS32FX164-20 NS32FX164-25 NS32FV16-20 NS32FV16-25 Advanced Imaging Communication Signal Processors General Description The NS32FX164 the NS32FV16 and the NS32FX161 are high-performance 32-bit members of the Series 32000 EPTM family of National’s Embedded System ProcessorsTM

SN74ABTH32543-EP

Abstract: 1A11 1A12 1A13 SN74ABTH32543MPZEP
Contextual Info: SN74ABTH32543-EP 36-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS757 – AUGUST 2002 D D D D D D D Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing

2A118

Contextual Info: Revised March 2001 74VCX32500 Low Voltage 36-Bit Universal Bus Transceivers with 3.6V Tolerant Inputs and Outputs General Description Features The VCX32500 is an 32-bit universal bus transceiver which combines D-type latches and D-type flip-flops to allow data

Contextual Info: Revised April 2001 FSTUD162450 Configurable 4-Bit to 20-Bit Bus Switch with −2V Undershoot Protection and Selectable Level Shifting and 25Ω Series Resistors in Outputs General Description Features The Fairchild Universal Bus Switch FSTUD162450 provides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speed

1A58

Contextual Info: Revised June 2001 FSTUD162450 Configurable 4-Bit to 20-Bit Bus Switch with −2V Undershoot Protection and Selectable Level Shifting and 25Ω Series Resistors in Outputs General Description Features The Fairchild Universal Bus Switch FSTUD162450 provides 4-bit, 5-bit, 8-bit, 10-bit, 16-bit, 20-bit of high-speed

B-Trip

Abstract: UR-Series
Contextual Info: UR-Series - UL1077 Recognized Supplementary Protector - 2 pole B-Trip E137915 One Pole Standard Pack: 6 Weight: 0.3A - 32A 1.75kg 3.86 lb. 40A - 63A 2.07kg (4.56 lb.) Rated Voltage 480Y/277V AC 480Y/277V AC 480Y/277V AC 480Y/277V AC 480Y/277V AC 480Y/277V AC

Contextual Info: IDT74ALVCH32501 3.3V CMOS 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 36-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS AND BUS-HOLD IDT74ALVCH32501 DESCRIPTION: FEATURES: This 36-bit universal bus transceiver is built using advanced dual metal

Contextual Info: MACH 5 CPLD Family BEYOND PERFORMANCE Fifth G eneration MACH A r c h it e l i. . ^ FEATURES — 128 to 512 m acrocell densities — 68 to 256 l/Os ♦ Wide selection of density and I/O combinations to support most application needs — 6 m acrocell density o ptions

5d3 diode

Abstract: 6B15 7b12 MACH Programmer transistor 7B12 2D15 PAL 007 A power generator control circuit schematic 1C12 5D10
Contextual Info: MACH 5 CPLD Family I MAC ncludes H Adv anc 5A Fam e In form ily atio n Fifth Generation MACH Architecture FEATURES ◆ High logic densities and I/Os for increased logic integration ◆ ◆ ◆ ◆ ◆ ◆ ◆ — 128 to 512 macrocell densities — 68 to 256 I/Os

MIL-STD-461B

Contextual Info: interpoint 10301 Willows Road PO. Box 9 7005 MTW SERIES DC-DC CONVERTERS Redmond. WA 9 80 73-9705 TEL: 206 882-3100 • • • • • • • • • • • TEL.-18001 8 22 -8 78 2 FAX: (2061 882-1990 Up to 30 watts output power 18 to 40Vdc input range

Contextual Info: SN74CBT16390 16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH SCDS035E – OCTOBER 1997 – REVISED OCTOBER 2000 D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of Texas Instruments’ Widebus Family 5-Ω Switch Connection Between Two Ports

Contextual Info: SN74GTLPH32916 34-BIT LVTTL-TO-GTLP UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS www.ti.com SCES380A – JANUARY 2002 – REVISED JUNE 2005 FEATURES • • • • • • • • Member of the Texas Instruments Widebus+ Family UBT™ Transceiver Combines D-Type Latches

Contextual Info: SN54ABT32501, SN74ABT32501 36ĆBIT UNIVERSAL BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCBS229B − JUNE 1992 − REVISED NOVEMBER 1994 • • • • • • Members of the Texas Instruments Widebus +  Family State-of-the-Art EPIC-ΙΙB  BiCMOS Design