28SOJ400 Search Results

01-I04

Abstract: KM641001A KM641001A-15 KM641001A-20
Contextual Info: PRELIMINARY KM641001A CMOS SRAM 256K x 4 B it With OE High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time 15,17,20 ns(Max.) • Low Power Dissipation Standby (TTL) The KM641001A is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words

KM641001

Contextual Info: KM641001 CMOS SRAM 256Kx 4 Bit With UE High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time 20,25,35 ns(Max.) • Low Power Dissipation Standby (TTL) : 40 mA(Max.) The KM641001 is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words

Contextual Info: PRELIMINARY KM641001A CMOS SRAM 256K x 4 Bit With OE High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast A ccess Time 15,17,20 ns(Max.) The KM641001A is a 1,048,576-bit high-speed Static • Low Power Dissipation Standby (TTL) Random Access Memory organized as 262,144 words

300b tube

Abstract: 90-FBGA-11 165-FBGA-1517 48-TSOP1-1220F 44-TSOP2-400BF-Lead-Free SAMSUNG MCP dram 0X13 SAMSUNG MCP 153 tray bga 64
Contextual Info: Samsung Proprietary [ Shipping Quantity Information ] As of 2004-03-02 Divide DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM DRAM

KM641001B

Contextual Info: PRELIMINARY KM641001B/BL CMOS SRAM Document Title 256Kx4 Bit with OE High Speed Static RAM(5V Operating), Evolutionary Pin out. Revision History Rev. No. History Draft Data Rev. 0.0 Initial release with Design Target. Feb. 1st 1997 Design Target Rev.1.0

Contextual Info: LH521002C SHARP CMOS 256K x 4 Static RAM Data Sheet FEATURES The ‘L’ version will retain data down to a supply voltage of 2 V. A significantly lower current can be obtained Idr under this Data Retention condition. CMOS Standby Current (lSB2) ¡s reduced on the ‘L’ version with respect to

Contextual Info: KM641001B CMOS SRAM Document Tills 256Kx4 Bit with OE High Speed Static RAM(5V Operating), Evolutionary Pin out. Revision History Rev. No. History Draft Data Rev. 0.0 Initial release with Design Target. Feb. 1st, 1997 R ev.1.0 Release to Prelim inary Data Sheet.

Contextual Info: CMOS SRAM KM641001 256K x 4 Bit With UB High-Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time 20,25,35 ns(Max.) The KM641001 is a 1,048,576-bit • Low Power Dissipation Random Access Memory organized as 262,144 words Standby (TTL)

Contextual Info: PRELIMINARY KM641001B CMOS SRAM Document Title 256Kx4 Bit with OE High Speed Static RAM(5V Operating), Evolutionary Pin out. Revision History Rev. No. History Draft Data Rev. 0.0 Initial release with Design Target. Feb. 1st, 1997 Design Target Rev.1.0 Release to Preliminary Data Sheet.

42-SDIP-600

Abstract: CF RM sot89 P2400F 12-DIPH-300
Contextual Info: PACKAGE DIMENSIONS Dim ensions in Milimeters 8-DIP-300 .n n n n LJ LI o U LJ 12-DIPH-300 12 n ri a n n n o tx u lj" 'U L J 'T T 6 KP 283 Cl C ff ELECTRONICS PACKAGE DIMENSIONS Dimensions in Milimeters •K-DIPH-300 16-DIP-300A nrn¡~ir~ir-|¡~ir~in o LJ LJ LJ LJ LJ LJ U

Contextual Info: KM641001/L CMOSSRAM 256K X 4 Bit with OE High-Speed CMOS Static RAM FEATURES Fast Access Time 20,25,35ns(Max.) Low Power Dissipation Standby (TTL) : 40mA(Max.) (CMOS) : 2mA(Max.) 0.5mA(Max.) - L-Ver. only Operating KM641001/L - 20 : 150mA(Max.) KM641001/L - 25 : 130mA(Max.)

Contextual Info: KM611001/L CMOS SRAM 1M x 1Bit High-Speed CMOS SRAM FEATURES GENERAL DESCRIPTION • Fast Access Time 20, 25, 35ns Max. • Low Power Dissipation Standby (TTL) : 40 mA(Max.) (CMOS): 2 mA(Max.) 0.5 mA(Max.) - L-ver. Operating KM611001/L -20 : 130 mA(Max.)

LH521002AK25

Contextual Info: LH521002A CMOS 256K x 4 Static RAM • Low Power Standby when Deselected High frequency design techniques should be employed to obtain the best performance from this device. Solid, low impedance power and ground planes, with high frequency decoupling capacitors, are desirable. Series

KM641001-20

Abstract: KM641001-25 km641001 TAE 1102 KM641001-35 KM641001P d02144
Contextual Info: CMOS SRAM KM641001 256K x 4 Bit With UB High-Speed CMOS Static RAM GENERAL DESCRIPTION FEATURES The KM641001 is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words • Fast Access Time 20,25,35 ns(Max.) • Low Power Dissipation

28DIP300

Abstract: 24-DIP-300 28-DIP-300 J400 32-TS0P1-0814F 28-SOJ-300 28-DIP-600B
Contextual Info: P A C K A G E DIMENSIONS Unit : mm/inch 24-DIP-300 485 ELECTRONICS PA C K A G E DIMENSIONS Unit : mm/inch 28-DIP-300 486 ELECTRONICS PA C K A G E DIMENSIONS Unit : mm/inch 28-DIP-600B 487 ELECTRONICS PA C K A G E DIMENSIONS Unit : mm/inch 32-DIP-600 488 ELECTRONICS

Contextual Info: KM611001/L CMOS SRAM 1M X 1Bit High-Speed CMOS SRAM FEATURES GENERAL DESCRIPTION • Fast Access Time 20,25,35ns Max. • Low Power Dissipation Standby (TTL) : 40mA(Max.) (CMOS): 2mA(Max.) 0.5 mA(Max.) - L-ver. Operating KM611001/L-20:130 mA(Max.) KM611001/L-25:110 mA(Max.)

Contextual Info: CMOS SRAM KM641001A Document Title 256Kx 4 High Speed Static RAM 5V Operating , Evolutionary Pin Out. Operated at Commercial Temperature Range. Revision History Rev. No. History Rev. 0.0 Initial release with Design Target. Jan. 18th, 1995 Design Target Rev. 1.0

SOJ28-P-400

Contextual Info: LH521002C CMOS 256K x 4 Static RAM Data Sheet The ‘L’ version will retain data down to a supply voltage of 2 V. A significantly lower current can be obtained IDR under this Data Retention condition. CMOS Standby Current (ISB2) is reduced on the ‘L’ version with respect to

KM641001B

Contextual Info: PRELIMINARY KM641001B/BL CMOS SRAM Document Title 256Kx4 Bit with OE High Speed Static RAM(5V Operating), Evolutionary Pin out. Revision History Rev. No. History Draft Data Rev. 0.0 Initial release with Design Target. Feb. 1st 1997 Design Target Rev.1.0

32-PIN

Contextual Info: LH521002B FEATURES • Fast Access Times: 17/20/25/35 ns • JEDEC Standard Pinouts • Low Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully Static Operation • 2 V Data Retention L Version • Packages: 28-pin, 300-mil SOJ (Preliminary)

KM641001A

Abstract: KM641001A-15 KM641001A-20
Contextual Info: PRELIMINARY CMOS SRAM KM641001A Document Title 256Kx 4 High Speed Static RAM 5V Operating , Evolutionary Pin Out. Operated at Commercial Temperature Range. Revision History Rev. No. History Draft Data Rev. 0.0 Initial release with Design Target. Jan. 18th, 1995