25FL1BB2 Search Results

Contextual Info: F/ CYPRESS PRELIMINARY W 48C 101-01 Spread Spectrum BX System Frequency Generator Features CPU0:3 Clock S ke w :. 175 ps • Maximized EMI suppression using Cypress’s Spread Spectrum technology • Four copies of CPU output

Contextual Info: CY7C455 CY7C456 CY7C457 W M CYPRESS 5 1 2 x 1 8 , IK x 18, and 2 K x l8 Cascadable Clocked FIFOs with Programmable Flags Functional D escription Features • 512 x 18 CY7C455 , 1,0 24x 18 (CY7C4S6), 2,048 x 18 ( CY7C457) FIFO buffer memory • Expandable in width

319S2

Contextual Info: WFw CYPRESS CY7C374Ì ADVANCED INFORMATION UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology — JTAG interface

Contextual Info: PRELIMINARY CY7C1512 64K x 8 Static RAM Features and three-state drivers. This device has an automatic pow­ er-down feature that reduces power consumption by more than 75% when deselected. • High speed — tAA = 15ns Writing to the device is accomplished by taking chip enable

fifo asi cypress

Contextual Info: CY7C63000/CY7C63001 CY7C63200/CY7C63201 CY7C63000 CY7C63001 CY7C63200 CY7C63201 Universal Serial Bus Microcontroller Cypress Semiconductor Corporation • 3901 North First Street • 2 5 8 ^ 1 , 2 0 0 1 7 4 b b 4flR San Jose • CA 95134 • 408-943-2600 October 1996 - Revised December 23,1996

Contextual Info: '/ CYPRESS 1M x 1 Static RAM Features Functional Description • High speed — U a = 12 ns The CY7C1007 is a high-performance CMOS static RAM organized as 1,048,576 words by 1 bit. Easy memory expansion is provided by an active LOW chip enable CE and three-state drivers.

Contextual Info: CY54/74FCT163T sr/C Y P R E S S 4-Bit Binary Counter Features • Matched rise and fall times • Function, pinout, and drive compatible with FCT and F logic • Fully compatible with TTL input and output logic levels • FCT-C speed at 5.8 ns max. ComU

Contextual Info: CY7C441 CY7C443 y CYPRESS Clocked 512 x 9, 2K x 9 FIFOs Features Functional D escription • 512 x 9 CY7C441 and 2,048 x 9 (CY7C443) FIFO buffer memory The CY7C441 and CY7C443 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and

Contextual Info: PRELIMINARY CYPRESS UltraLogic 32-Macrocell Flash CPLD Device CPLD and is part of the FLASH370i “ family of high-density, high­ speed CPLDs. Like all members of the FLASH370i family, the CY7C371i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI

Contextual Info: CYM1720 CYPRESS Features • High-density 768-kilobit SRAM module • High-speed CMOS SRAMs — Access time of 15 ns • 56-pin, 0.5-inch-high ZIP package • Low active power — 1.8W max. for t\A = 25 ns • SMD technology • TTL-compatible inputs and outputs

Contextual Info: I /¿0/9U Revision: August 18, 1994 CY7C419/21/25/29/33 / CYPRESS 256x9,512x9, 1K x 9, 2Kx9, 4K x 9 Cascadable FIFO Functional Description Features • 256 z 9,512 x 9 ,1,024 x 9,2048 x 9, and 4096 x 9 FIFO buffer memory • Dual-port RAM cell • Asynchronous read/write

Contextual Info: V CYPRESS CY7C4261 CY7C4271 PRELIMINARY 16K/32Kx 9 Synchronous FIFOs Features Functional Description • 16K x 9 CY7C4261 • 32K x 9 (CY7C4271) • High-speed 100-MHz operation (10 ns read/write cycle time) • Pin-compatible density upgrade to CY7C42X1 family

7G470

Abstract: CY7C470 CY7C472 CY7C474 25A1bbS
Contextual Info: bSE D CYPRESS Q01Q7bö bb3 • CYP SEMI CONDUCTOR PRELIMINARY CY7C470 CY7C472 CY7C474 2 CYPRESS 8K x 9 FIFO, 16K x 9 FIFO, 32K x 9 FIFO with Programmable Flags Features Functional Description 8K x 9 , 16K x 9, and 32K x 9 FIFO buffer memory Asynchronous read/write

MTL ICC 317

Abstract: CY7C433A IDT7203 IDT7204 CLCC 64 pins footprint
Contextual Info: CYPRESS SEMICO NDU CTOR bSE D • 5S0Tbb2 DQlDbSfl Ô33 ■ CYP CY7C429A PRELIMINARY _CY7C433A High-Speed Cascadable 2K x 9 FIFO 4K x 9 FIFO Features • 2,048 x 9 and 4,0% x 9 FIFO buffer memory • Dual-port RAM cell • TTL compatible • Three-state outputs