256X4 Search Results

AM9101

Abstract: P2101 am2101 AM9101CPC AM9101PC AM9101ADC AM9101BPC l01a #500 P2101-1 9101C
Contextual Info: Am9101/Am91L01/Am2101 FAMILY 256x4 Static R /W Random A cce ss Memories PART NUMBER Am2101 Am2101-2 Am 9l01 A Am91 L01A Am2101 -1 Am 9101B Am 91L01ß Am9101C Am91 L01C Am 9101D A CCESS TIME 1000ns 650ns 500ns 400ns 300ns 250ns D IS T IN C T IV E C H A R A C T E R I S T I C S

27s21

Abstract: AMD 27S21 AM27S21 21A1
Contextual Info: Am27S21 /27S21A AdvaMcro 1,024-Bit 256x4 Bipolar PROM Devices DISTIN CTIVE CH ARA CTERISTICS • • • • • • High speed Highly reliable, ultra-fast programming Platinum-Silicide fuses High programming yield Low-current PNP inputs High-current open-collector and three-state outputs

DIODE AH10

Abstract: 93L422 93L422XM 22-PIN 93L422DC 93L422 FAIRCHILD
Contextual Info: TTL ISOPLANAR MEMORY 93L422 256x4-B IT FULLY DECODED RANDOM ACCESS MEMORY DESCRIPTION - The 93L422 is a 1024-bit Read/Write Random Access Memory or­ ganized 256 words by four bits per word. The 93L422 has 3-state outputs, and is de­ signed prim arily for buffer control storage and high performance main memory applica­

ram 7489

Abstract: 74ls189 ram 74LS289 ci 7489 ci 9410 74LS189 16x4-Bit pin diagram 7489 IRF 725 7489 logic diagram
Contextual Info: •U Ç>> N> Item 16x4 16x4 16x4 7489 16x4 9410 CO fO 16x4 o> cn A 256x1 93410 256x1 93411A 256x1 93410A CO 00 -vj 256x1 93411 o 256x1 93L420 256x1 93421 64x9 93419 256x1 j 93L421 CO ro 256x1 93421A 256x4 93412 ro cn 05 X A 93L412 Organization cn cn a cn a

91L22

Contextual Info: it Advanced Micro Devices Am9122/Am91 L22 256x4 Static RAM DISTINCTIVE CHARACTERISTICS • • • Single 5-volt power supply — ±10% tolerance both Commercial and Military High-performance replacement for 93422/93L422 Fast access times — as low as 25 ns

Contextual Info: Jlaar X22C12 1KBit 256x4 Nonvolatile Static RAM FEATURES DESCRIPTION * High Performance CMOS — 150ns RAM Access Time * High Reliability — Store Cycles: 1,000,000 — Data Retention: 100 Years • Low Power Consumption — Active: 40mA Max. — Standby: 100^iA Max.

27S21

Abstract: AmZ7S21 am27521 AMD 27S21 prom 256x4 bit AM27S21 AM27S21DC AM27S21A 27s25
Contextual Info: a Am27S21 /27S21A Adva^ 1,024-Bit 256x4 Bipolar PROM Devices DISTIN CTIVE CHARACTERISTICS • • • High speed Highly reliable, ultra-fast programming Platinum-Silicide fuses High programming yield • Low-current PNP inputs • High-current open-coliector and three-state outputs

UPD5101L

Abstract: 5101L PD5101L PD5101 d5101l 5101L-1
Contextual Info: MPD5101L SEC N E C E le c tr o n ic s U S A In c . m P D 51 o i h Microcomputer Division 1024 BIT 256x4 ST A T IC C M O S RAM DESCR I P T I O N T h e /UPD5101L and p P D 5 1 0 1 L -1 are v e ry lo w p o w e r 1024 b it (2 56 w o rd s b y 4 bits) sta tic C M OS R an d o m Access M e m ories. T h e y m e et th e lo w p o w e r re q u ire m e n ts o f

S6501

Abstract: c i S6501 S6501-8 S6501L S6501L1 S6501L3 S6501L8 256X4 CMOS RAM
Contextual Info: S6501 1024 BIT 256x4 STATIC CMOS RAM Features General Description □ Ultra Low Standby Power The AMI S6501 family of 256x 4-bit ultra low power CMOS RAMs offers fully static operation with a single + 5 volt power supply. All inputs and outputs are direct­

X22C12

Abstract: 3817 X2212
Contextual Info: Xuaip Advance Information 1K Bit X22C12 256x4 Nonvolatile Static RA M FEATURES DESCRIPTION • High P erform ance CMOS — 120 ns RAM A ccess Tim e • High R e lia b ility — S tore C ycles: 1,000,000 — Data R etention: 100 Years • Low Pow er C o nsu m ption

Contextual Info: Advance Information 1KBit X iB B X22C12 ! 256x4 Nonvolatile Static RAM FEATURES DESCRIPTION • High Performance CMOS — 120 ns RAM Access Time • High Reliability — Store Cycles: 1,000,000 — Data Retention: 100 Years • Low Power Consumption — Active: 40 mA Max.

co-toc

Abstract: CERAMIC LEADLESS CHIP CARRIER 12G014-2C 12G014-2L 12G014-3C 12G014-3L 12G014-3X
Contextual Info: /G B L? GigaBit Logic 12G014 256x4 Bit Registered, Self-Timed Static RAM 2.5 ns Cycle Time _ 12G NanoRAM Family_ FEATURES Latch mode output for fast access with extended cycle Nanosecond access and cycle times Single-ended or differential clock input

512x4

Abstract: 63S081 256X8 prom 63s3 S/BIP/SCB345100/B/30/10/53/63S281/A
Contextual Info: PROM SELECTION GUIDE REGISTERED PROMS PROMS T a a k s lc c ( mA) C o m i/ M il D evice Number Pins Size Output 53/63S080 53/63S081 63S081A 16 (20) 'ÄK 32X8 OC TS TS 25/35 25/35 /25 125 53/63S140 53/63S141 53/63S141A 16 (20) 1K 256X4 OC TS TS 45/55 45/55

prom 256x4 bit

Abstract: prom 82S126 82S126 82S129 82S129/BEA GDFP2-F16 GDIP1-T16 32 x 32 matrix
Contextual Info: Philips Semiconductors Military Bipolar Memory Products Product specification 82S126 82S129 1K-bit TTL bipolar PROM 256x4 • Random logic • Code conversion FEATURES • Address access time: 60ns max • Input loading: -150µA max • On-chip address decoding

AY 1241

Abstract: 22-PIN 93L41 93L412
Contextual Info: TTL ISOPLANAR MEMORY 93L412 'J 256x4-BIT FULLY DECODED RANDOM ACCESS MEMORY D E S C R IP T IO N — The 93 L 4 1 2 is a 10 2 4 -b it R ead /W rite Random A ccess M e m ory o r­ ganized 2 5 6 w ord s by fo u r b its per w ord . The 9 3 L412 has un com m itted collecto r o u t­

6331-1 prom

Contextual Info: Generic NiCR PROM Fam ily 53/63XXX-1 53/63XXX-2 F eatures/ Benefit Description • From 256 Bit to 8192 Bit memory The 53/63XX series generic PROM fam ily offers a w ide selection of size and organizations. The 4-bit w ide PROMs range from 256x4 to 2048x4 and feature up w ard/dow nw ard pin out com ­

82s129 programming

Abstract: 82s126 programming 82S129 N825129 82S126 N82S126 bipolar rom 256*4 S82S129 prom 82S126 signetics 82S129
Contextual Info: • s m n n t i P i : O iy iH - L I U d 1024- b i t b i p o l a r PROGRAMMABLE ROM 256x4 PROM F E B R U A R Y 1975 f i? ç i? R 82S129 DIGITAL 8000 SERIES TTL/MEMORY DESCRIPTION The 82S126 (Open Collector Outputs) and the 82S129 (Tri-State Outputs) are Bipolar 1024-Bit Read Only Mem­

bipolar rom 256*4

Abstract: prom 256x4 bit signetics 1016 82S226 82S229
Contextual Info: sggnotiBS 1024-BIT BIPOLAR READ ONLY MEMORY 256x4 ROM FEBRUARY 1975 82S226 82S229 DIGITAL 8000 SERIES TTL/MEMORY DESCRIPTION PIN CONFIGURATION Th e 82S226 (Open Collector Outputs) and the 82S229 (Tri-State Outputs) are Bipolar 1024-Bit Read O n ly Mem­

Contextual Info: GEC PLESSEY S V M I c; O N l IJ , I () K m a s io i Radiation Hard 256x4 Bit Static RAM s S10304FDS Issue 1.2 October 1990 Features • 3|im CMOS-SOS technology — — Address Butler» • Latch-up free Cell Array 32 R o m tt Columns Row Decoders (Enable)

S5101L-3

Abstract: S5101L-1
Contextual Info: AMI S5101 AMERICAN MICROSYSTEMS. INC. 1024 BIT 256X4 STATIC CMOS RAM Features General Description □ Ultra Low Standby Power The AMI S5101 family of 256x 4-bit ultra low power CMOS RAMs offers fully static operation with a single + 5 volt power supply. All inputs and outputs are direct­

fujitsu series MB

Abstract: Fujitsu mb 7071 MB7071H
Contextual Info: / ECL 1024-BIT MB 7071N/E/H BIPOLAR RANDOM FUJITSU ACCESS MEMORY 002531 X ; Û Ê lC r o ^ VC > puT September 1978 4 L 1 4189Q 256x4 BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MB 7071 N /E /H are fu lly decoded 1024-bit ECL read/w rite random access memories designed fo r

Contextual Info: STATIC CMOS RAMs, COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE DESCRIPTION PART TAA ns PACKAGES/PINS SIZE NUMBER P J S PP 22 P93U422 35 24 256x4 1K P4C422 22 10/12/15/25/35 24 256x4 1K P4C147 18 10/12/15/20/25 4Kx1 w/Separate I/O 4K P4C148 18 10/12/15/20/25

63S140

Abstract: 53S140 53S141 63S141 53S141A 256X4 63S141A Monolithic Memories
Contextual Info: High Performance 2 5 6 x 4 PROM TiW PROM Family 5 3 /6 3 S 1 4 0 5 3 /6 3 S 1 4 1 5 3 /6 3 S 1 4 1 A Features/ Benefits Description • 30-ns maximum access time The 53/63S140 and 53/63S141/A are 256x4 bipolar PROMs featuring low input current PNP inputs, full Schottky clamping,

N82S126

Abstract: 82S126 32 x 32 matrix prom 256x4 bit 82S129
Contextual Info: BIPOLAR MEMORY MAY 1982 1024-BIT BIPOLAR PROM 256x4 82S126 (O.C.)/82S129 (T.S.) DESCRIPTION FEATURES The 82S126 and 82S129 are field p ro g ra m ­ mable, w hich means th a t cu sto m patterns