Phico D - 0
Abstract: nec upd 1511 Phico D 0 phico d-0 94 PHICO phico d-0 Phico DO - 0 TQ00
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT ¿tPD78370 A , 78372(A) 16 BIT SINGLE-CHIP MICROCOMPUTER The /iPD78372(A) contains a high-speed, high-performance 16-bit CPU and offers powerful arithmetic operation functions. An A/D converter and a real-time pulse unit, which provide the real-time control required in motor control,
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upd78370upd78372/ipd7837216-bit+14/pd78372jipd78370/jpd78372/jpd78p372pd78372u10642ejphico d - 0nec upd 1511phico d 0phico d-0 94phicophico d-0phico do - 0tq00
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UPD444
Abstract: UPD444-1 MPD444
Contextual Info: fiPD444 /¿PD444-1 /iPD444-2 /iPD444-3 ^ NEC NEC Electronics U.S.A. Inc. Microcomputer Division 1024 x 4-BIT STATIC CMOS RAM DESCRIPTION T h e /LfPD444 is a high-speed, lo w p o w e r s ilic o n gate C M OS 4 0 9 6 b it s ta tic R A M o rg a n ize d 1 02 4 w o rd s b y 4 b its . I t uses DC stable s ta tic c ir c u itr y th ro u g h o u t and th e re
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upd444upd444-1upd444-2upd444-3+5/lfpd444lm27s2sdch157m//pd42s18160mpd444
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001107
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿ P D 42S 16405L , 4216405L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, HYPER PAGE MODE EDO D e s c rip tio n T h e/iP D 42S 16 405L , 4216405L a re 4 ,1 94,304 words by 4 bits CMOS dynam ic RAM with optional hyper page mode
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16405l4216405lupd42s16405lupd4216405l+4pd42s16405l26-pinvp15-207-2001107
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Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT «PD78070AY - . i 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The /uPD78070AY is a limited-function product from which the on-chip ROM of the /¿PD78078Y subseries has been removed. Through interchangeable external ROM, program maintenance can be performed easily. Besides a high-speed,
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pd78070ay/upd78070aypd78078yb4e75es |
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upb426c
Contextual Info: O 1- ' mPB406/406-1/406-2 mPB426/426-1/426-2 NEC NEC Electronics US.A. Ina 1024 W ORD B Y 4-BIT 4096-BIT BIPOLAR T T L PROM M icrocom puter Division i\à " it D escrip tio n ^ The/U.PB406 and /xPB 426 are high-speed, electrically pro gram m able, fully decoded 4096-bit T T L read-only m em o
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upb406upb406-1upb406-2upb426+6upb426-1upb426-24096-bitpb406lm27s2supb426c
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8080AF
Abstract: UPD8080A 4218160 UPD8080AF A10C UPD8080AF-1 PD8080AF UPD8080AF-2
Contextual Info: /¿PD8080AF mPD8080AF-2 ^fiPD8080AF-1 NEC NEC Electronics U.S.A. Inc. Microcomputer Division /XPD8080AF 8-BIT N-CHANNEL MICROPROCESSOR FAMILY DESCRIPTION T h e / jP D 8 0 8 0 A F is a c o m p le te 8 -b it p aralle l processor fo r use in general purpose d ig ita l c o m p u te r system s. I t is fa b ric a te d on a single LS I c h ip using N -c h a n n e l silicon
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upd8080afupd8080af-2upd8080af-1/xpd8080af+8lm27s2s001157m//pd42s181608080afupd8080a4218160a10cpd8080af
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UPD5101L
Abstract: 5101L PD5101L PD5101 d5101l 5101L-1
Contextual Info: MPD5101L SEC N E C E le c tr o n ic s U S A In c . m P D 51 o i h Microcomputer Division 1024 BIT 256x4 ST A T IC C M O S RAM DESCR I P T I O N T h e /UPD5101L and p P D 5 1 0 1 L -1 are v e ry lo w p o w e r 1024 b it (2 56 w o rd s b y 4 bits) sta tic C M OS R an d o m Access M e m ories. T h e y m e et th e lo w p o w e r re q u ire m e n ts o f
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5101l256x4upd5101lupd5101l-1+8lipd5101/upd5101l-1lm27s2s//pd42s18160pd5101lpd5101d5101l5101l-1
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nec 444 ram
Abstract: PD2114L PD444C MPD444C 2SO 765 PD42S18160 uPD444-3 pd2114 MPD444 nec chic
Contextual Info: fiPD444 /¿PD444-1 /iPD444-2 /iPD444-3 ^ NEC NEC Electronics U.S.A. Inc. Microcomputer Division 1024 x 4-BIT STATIC CMOS RAM D ESCR IPTIO N The /LfPD444 is a high-speed, low power silicon gate CMOS 4096 bit static RAM orga nized 1024 words by 4 bits. It uses DC stable static circuitry throughout and there
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upd444upd444-1upd444-2upd444-3+13/lfpd444/jpd444lm27s2s//pd42s18160nec 444 rampd2114lpd444cmpd444c2so 765pd42s18160pd2114mpd444nec chic
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mPB8224
Abstract: B8224 4218160 8224d upb8224 ESI 0018 PD42S18160 pb8228 MPB8224C
Contextual Info: NEC vvjiPB8224 NEC Electronics USA. Inc. Microcomputer Division CLOCK GENERATOR AND DRIVER FOR 8080A PRO CESSO RS DESCRIPTION The jP B8224 is a single chip clock generator and driver fo r 8080A processors. The clock frequency is determined by a user specified crystal and is capable of
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upb8224b8224/hpb8224lm27s2s+8//pd42s18160mpb822442181608224desi 0018pd42s18160pb8228mpb8224c
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d5101l
Abstract: PD5101L upd5101 5101L-4 mpD5101 5101L
Contextual Info: MPD5101L SEC N E C E le c tr o n ic s U S A In c . m PD51o i h Microcomputer Division 1024 BIT 256x4 STATIC CMOS RAM DESCR I P T I O N T h e /UPD5101L and p P D 5 1 0 1 L -1 are v e ry lo w p o w e r 1024 b it (2 56 w o rd s b y 4 bits) sta tic C M OS R an d o m Access M e m ories. T h e y m e et th e lo w p o w e r re q u ire m e n ts o f
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5101lupd5101l-1256x4/upd5101l+10lipd5101/upd5101l-1lm27s2sdch157m//pd42s18160d5101lpd5101lupd51015101l-4mpd5101
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1V154M
Contextual Info: CHIPS SVH SERIES SVH SERIES N E C 's S V H se ries so lid ta n ta lu m ca p a c ito rs h ave been d e v e lo p e d fo r a u to m o tiv e a p p lic a tio n . C o m p a re d to th e fo rm e r ty p e R se ries , th e h ig h e r re lia b ility an d h ig h e r p e rfo rm a n c e h a v e b een b u ilt
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1000hb427s2s1v154m |
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Contextual Info: CHAPTER 24 CPU INSTRUCTION SET DETAILS This chapter provides a detailed description of the operation of each V r4101 instruction in both 32- and 64-bit modes. The instructions are listed in alphabetical order. Exceptions that may occur due to the execution of each instruction are listed after the description of each
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r410164-bitr4x00vr4101 |
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D482445LGW-A70
Abstract: cwi 1011
Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT /¿PD482444, 482445 4M-Bit Dual Port Graphics Buffer 256K-WORD BY 16-BIT D escrip tio n The /iPD482444 and ^PD482445 have a random access port and a serial access port. The random access port has a 4M-bit 262, 144 words x 16 bits memory cell array structure. The serial access port can perform clock
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pd482444256k-word16-bit/ipd482444+8pd482445ipd482445008t8oo2020tgbm2752500b3fldd482445lgw-a70cwi 1011
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b4000 ldr
Abstract: MIPS R4200 IC-3374 sdcz NEC R4400
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT uPD30450 V r 4200 64-BIT M IC R O P R O C E SSO R D E S C R IP T IO N The /¿PD30450 Vr4200 is one of NEC's RISC (Reduced Instruction Set Computer) microprocessors, Vr series™, and is a high-performance 64-bit microprocessor employing the RISC architecture developed by MIPS.
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4200tmupd3045064-bitpd30450+9vr4200r42001eu-1392vr4000b4000 ldrmips r4200ic-3374sdcznec r4400
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Contextual Info: DATA SHEET NEC / MOS INTEGRATED CIRCUIT / jtfPD42S4400L, 424400L 3.3 V OPERATION 4 M-BIT DYNAMIC RAM 1 M-WORD BY 4-BIT, FAST PAGE MODE Description T h e /iP D 4 2 S 4 4 0 0 L , 4 2 4 4 0 0 L a re 1 ,0 4 8 ,5 7 6 w o r d s b y 4 b its d y n a m ic C M O S R A M s .
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jtfpd42s4400l424400l4400l |
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pc1225h
Abstract: NEC Relay MR31 UPC1225H UPC1225H equivalent mPC1225H uPC1225 uPC1225H ic 1225H C1225H pc1237h
Contextual Info: N E C ELECTRONICS E L E C TR O N IC S INC S 642 75 25 N E C INC OSE D J b 4E7SES [][]EE7Eh 0 1~~ 05E 22726 D - BIPOLAR ANALOG INTEGRATED C IR C U IT M PC1225H T-7V-C5-C 3 0 - 5 0 W POWER A M P LIFIE R DRIVER DESCRIPTION liP C1225H is designed fo r use w ith a Hi-Fi power amplifier driver. It is composed of a differential amplifier, a pre driver, a
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upc1225hc1225hm27s2s0d227m2+8pc1225hnec relay mr31upc1225h equivalentmpc1225hupc1225upc1225h ic1225hpc1237h
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uCOM-4
Abstract: 4218160 UPD556B uCOM-4 instruction set PD42S18160 ucom44 b427525
Contextual Info: fiPD556B \ / SEC NEC Electronics US.A. Inc. Microcomputer Division fiCOM-4 4-BIT SINGLE CHIP ROM-LESS EVALUATION CHIP DESCRIPTION T h e ;uPD556B is the ROM-less evaluation chip fo r the ;uCOM-4 4 -b it single chip m icro com puter fa m ily . The /liP D 5 56B is used in conjunction w ith an external 2 0 4 8 x 8-bit
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upd556b/upd556blm27s2s001157m+7//pd42s18160ucom-44218160ucom-4 instruction setpd42s18160ucom44b427525
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PB8228C
Abstract: PB8224 8080a PD8080A uPB8228 UPB8238 8228 DI JPB8228 b8228 PB8228
Contextual Info: /iPB8228 NEC NEC Electronics U SA Inc. Microcomputer Division 8080A S Y S T E M C O N T R O L L E R A N D B U S D R IV E R DESCRIPTION The /JPB8228 is a single chip con troller and bus driver fo r 8080A based systems. A ll the required interface signals necessary to connect RAM , ROM and I/O components
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upb8228/jpb8228pb8228lm27s2s+9//pd42s18160pb8228cpb82248080apd8080aupb82388228 dijpb8228b8228
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8080A
Abstract: RT 8214 UPB8214 DS8212D PD42S18160 MPB8214 nec 8212 8214 ta 8214 k 8214 interrupt
Contextual Info: jiPB8214 NEC NEC Electronics OS.A. Inc. Microcomputer Division PRIORITY INTERRUPT CONTRO LLER D E S C R IP T IO N T h e / iP B 8 2 1 4 is an eight-level p rio rity in te rru p t controller. D esign ed to s im p lify interrup t driven m icro c o m p u te r system s, the /JP B 8214 requires a single + 5 V pow er
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upb8214lm27s2s001157m//pd42s18160+98080art 8214ds8212dpd42s18160mpb8214nec 82128214ta 8214 k8214 interrupt
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PD42S18160
Abstract: ic321 b4H7525
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /¿ P D 4 2 S 1 8 1 6 0 L , 4 2 1 8 1 6 0 L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The ¿¿PD42S18160L, 4218160L are 1,048,576 words by 16 bits CMOS dynamic RAMs. The fast page mode
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16-bitupd42s18160lupd4218160lpd42s18160l+950-pin42-pinpd42s18160l-a704218160l-a70vp15-207-2b4275espd42s18160ic321b4h7525
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nec 28 pin
Abstract: 4217400-60 DGS22
Contextual Info: MOS INTEGRATED CIRCUIT f/¿PD42S16400 ,4216400,42S17400,4217400 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, FAST PAGE MODE DESCRIPTION T he ¿iPD42S 16400, 4216400, 42S17400, 4217400 are 4 194 304 w o rd s by 4 bits d y n a m ic CMOS RAMs. These d iffe r in refresh cycle and the ¿¿PD42S16400, 42S17400 can execute CAS before RAS se lf refresh and
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upd42s16400upd4216400upd42s17400upd4217400+7ipd42s42s17400pd42s16400//pd42s16400nec 28 pin4217400-60dgs22
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D27C1001a
Abstract: D27C1001 D27C100 7804H
Contextual Info: PRELIM IN A RY PRO D U C T INFORMATION MOS INTEGRATED CIRCUIT ¿¿PD78P372 16 BIT SINGLE-CHIP MICROCOMPUTER The ¿iPD78P372 is produced by replacing the internal mask ROM of the #iPD78372 with a one-time PROM or EPROM. One-time PROM products, in which data can be written once are effective for manufacture of small
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upd78p372ipd78p372ipd78372ieu-840+6pd78356d0a52t4d27c1001ad27c1001d27c1007804h
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8080AF
Abstract: D8080AF UPD8080A upd8080
Contextual Info: /¿PD8080AF mPD8080AF-2 ^fiPD8080AF-1 NEC NEC Electronics U.S.A. Inc. Microcomputer Division /XPD8080AF 8-BIT N-CHANNEL MICROPROCESSOR FAMILY D E S C R IP T IO N FEATU RES The /jPD 8080AF is a com plete 8-b it parallel processor fo r use in general purpose
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upd8080afupd8080af-2upd8080af-1/xpd8080af+88080af/jpd8080aflm27s2sdch157m//pd42s18160d8080afupd8080aupd8080
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4218160
Abstract: NEC 4218160 nec A2C UPD42S18160
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT /JPD42S18160,4218160 16 M-BIT DYNAMIC RAM 1 M-WORD BY 16-BIT, FAST PAGE MODE, BYTE READ/WRITE MODE Description The /tPD42S18160, 4218160 are 1,048,576 words by 16 bits CMOS dynamic RAMs. The fast page mode and byte read/write mode capability realize high speed access and low power consumption.
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upd42s1816016-bit/tpd42s18160/xpd42s18160+950-pin42-pinipd42s18160-60ipd42s18160-70vp15-207-2m27s254218160nec 4218160nec a2c
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