220KO Search Results

ECC83

Abstract: EL34 ECC82 ECC83 tube EL34 tube tube el34 ecc82 tube 100NF 630V R17-18 tube ecc83
Contextual Info: dynaco ST-70 http://users.otenet.gr/~athsam/dynaco_ST70.htm Tube Power amp. Dynaco ST-70 Part List 1 av 2 R1= 220Kohms R9-10= 2.2Kohms C2-3-4= 100nF 630V R2-22-23= 100Kohms R11-12= 27Kohms C5= 2X22uF 550V R3= 1.2Kohms R13-14= 120Kohms V1= ECC83 R4= 47 ohms

Contextual Info: ±5% Tolerance 1210 to 2512 Chip Resistors miniReel miniBag Order Number System 65 7 Size XXX Code Q TyPe 65 = miniReel 45 = miniBag Size Code See Chart Below 7 =1210 8 =2010 9 = 2512 iiilsi 1210 1000 pc. 2 5 0 pc. Reel Bag 2010 250pc. 100 pc. Bag Reel 2512

Contextual Info: ±5% Tolerance 0402 to 1206 Chip Resistors |w|_ ii Dimensions L x W : 5% Resistance Values Ohm OQ IQ 4.7Q 10Q 110 120 13Q 15Q 16Q 18Q 200 220 24£2 27Q 30Q 33£2 36Q 39Q 43Q 470 51Q 56Q 62Q 68Q 75Q 82Q 910 Order Order Order Order Code Ohm Code Ohm Code Ohm Code

AN899

Abstract: ST6265 MICROCONTROLLER 1062E TRIAC BT 816 IOR 421h 3.6v jp nicd battery CRYSTAL SMD 8MHZ B 660 TG ST AN887 PDIP20
Contextual Info: ST6208C/ST6209C ST6210C/ST6220C 8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET • ■ ■ ■ ■ ■ Memories – 1K, 2K or 4K bytes Program memory OTP, EPROM, FASTROM or ROM with read-out protection – 64 bytes RAM Clock, Reset and Supply Management

MC0603SAF1131T5E

Contextual Info: REVISIONS M ulticom p A LL RIGHTS RESERVED. NO PORTION OF THIS PUBLICATION, WHETHER IN WHOLE OR IN PART CAN BE REPRODUCED WITHOUT THE EXPRESS WRITTEN CONSENT OF SPC TECHNOLOGY. DCP # REV DOC. NO. SPC—F005 DESCRIPTION 1991 DRAWN RELEASED JN DATE » Effective: 7 / 8 / 0 2

CD40106

Abstract: zener smd diode 3.3v 500mw schematic diagram 48V telecom ups zener diode 3.3v 500mw, philips make philips 3.3V DC-DC converter step down transzorb 5v pq48033 pq48050 schematic diagram 48v dc convertor schematic diagram circuit 48V controller
Contextual Info: Application Note 23 SMH4804/SMT4004 Telecom Reference Design with SynQor DC/DC Converters INTRODUCTION The circuit design required to convert the –48V bus to the voltages required by network processors, ASICs, miscellaneous logic, etc., is presented in this Application

Contextual Info: EM78P451S OTP ROM EM78P451S 8-BIT MICRO-CONTROLLER Version 1.0 EM78P451S OTP ROM Specification Revision History Version 1.0 Content Initial version This specification is subject to change without prior notice. 2 06.01.2004 V1.0 EM78P451S OTP ROM 1. GENERAL DESCRIPTION

l9122

Abstract: IT8510 asus RC415ME 12G140001089 ATI SB600 CON3603 RC415M ISL6262CRZ foxconn
Contextual Info: 5 4 3 2 1 T12R Block Diagram FAN + SENSOR MAX6657MSA PAGE 4 V2.0 CLOCK GEN ICS951463 CPU YONAH-CM D PAGE 5 DISCHARGER CIRCUIT D PAGE 37 PAGE 2,3 Power On Sequence FSB 533MHz PAGE 40 DC/BATT IN LVDS & INV ATI RC415M PAGE 12 CRT & TV OUT PAGE 13 PAGE 41 DDR2-533

attansic f1

Abstract: RC415M Attansic l1 RC415ME asus attansic lan schematic Attansic f2 PAD381 PT6319 d1106
Contextual Info: 5 4 3 F5R BLOCK DIAGRAM 2 1 CPU Yonah Single core Yonah Celeron D D Page 2 AGTL+ 133/166MHz LVDS Page 10 DDR2 533/667 RC415ME CRT Single Channel PCIE Page 11 DUAL DDR2 SO-DIMM Page 12,13,14 Page 5,6,7,8,9 PCIE X4 C C MINICARD SB600 Page 28 LAN 10/100 ATTANSIC L2

V3V REV-1.1

Abstract: asus C5027 r d5703 X7RA 47N217 C5706 c6005 3VA2 ICS954310BG
Contextual Info: A B C D E A8J/F SCHEMATIC R11 1 Content PAGE PAGE SYSTEM PAGE REF. 2 3 4 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 YONAH CPU 1 YONAH CPU (2) CPU CAP/THERMAL SENSOR CLOCK GEN. Calistoga-CPU

schematic diagram crt tv samsung

Abstract: PC821 P-12V-S samsung q45 c52ex schematic Samsung TV led PT137 Samsung R590 Samsung R418 samsung kbc
Contextual Info: This Document can not be used without Samsung’s authorization. 7 Schematic Diagrams and PCB Silkscreen 7-1 MAIN BOARD 7-1-1 Schematic Diagrams P30 7-1 7 Schematic Diagrams and PCB Silkscreen This Document can not be used without Samsung’s authorization.

Attansic L1

Abstract: pr6239 RC415M RC415ME ICS951463AGLFT ASUS attansic f1 RTS5117 C3902 ICS951463
Contextual Info: 5 4 3 F5R BLOCK DIAGRAM 2 1 CPU Yonah Single core Yonah Celeron D D Page 2 AGTL+ 133/166MHz LVDS Page 10 DDR2 533/667 RC415ME CRT Single Channel PCIE Page 11 DUAL DDR2 SO-DIMM Page 12,13,14 Page 5,6,7,8,9 PCIE X4 C C MINICARD SB600 Page 28 LAN 10/100 ATTANSIC L2

DIODE 22B4

Abstract: BA4602 ba41-00316a AR5212 MAP17-232 Q506 nvidia 7100 AR5211 27b1 diode geforce4
Contextual Info: X10 DRAW Model Name PBA Name PCB Code Dev. Step Revision APPROVAL AQUILA MAIN BA92-01774A BA41-#####A SR 1.0 CHECK : : : : : CPU :P4-BANIAS Chip Set :MCH-M ODEM Remarks :TEMP AQUILA 7 Schematic Diagrams and PCB Silkscreen 7-1 MAIN BOARD 7-1-1 Schematic Diagrams

NH82801GB

Abstract: NH82801GBM Intel NH82801GBM SL2501 sl8yb QG82945GM SL8Z2 LCD Inverter board s6f JP5000 M38857HP asus
Contextual Info: 5 4 3 2 1 PROJECT S6F D D Revision History R1.0 SR 2005/07/01 R1.1 ER 2005/11/25 R2.0 PR 2005/01/18 SMB Signals C Host Chipset Name Devices SMBCK,SMBDA Address ICH7-M ADT7460 Thermal ICS954213(Clock Genertor) DDR2 SO-DIMM C 0001 000X b 0101 110X b D2h A0h

RTS5158

Abstract: northbridge G41 se u10i layout GM965 28K1 IC NS0013 sla5t bga676 rtl8010 C1087
Contextual Info: A B C D E X'TAL 14.318MHz Merom Processor System Power Rail Management Dual-Core CLOCK GEN ICS9LPR358AGLFT uFCPGA 478 2 3,4 FSB (667/800 MHz) FSB 4 GM965/PM965 ATI M74M USB 1 LVDS ＊V ＊VS HIGH HIGH ON ON ON ON S3 (Suspend to RAM) LOW HIGH HIGH HIGH ON

88E8001

Abstract: max1987 AXK5 Socket AM2 Q156 a6vm Q152 1068v NV44MV F02JK2E
Contextual Info: 5 4 3 2 1 CPU DOTHAN 533MHZ D D PAGE 3,4 FSB 533MHz LVDS PAGE 25 PAGE 26 MCH-M Alviso PCI-E Nvidia G7XM CRT DDR2 DDR2 SO-DIMM PAGE 22,23,24 TV OUT PAGE 6,7,8,9,10 PAGE 12,13,14,15,16 ,55,56,57,58 PAGE 26 DMI interface PCMCIA PAGE 36 C PCI 33MHz PAGE 17 PRINTER PORT

CMI9880

Abstract: CMI9739A asus TPC28 CMI9739 max1987 1T329 LM339 foxconn 82570EI
Contextual Info: 5 4 3 2 1 DDR2 SO-DIMM PCIE SLOT CLOCK GENERATOR PAGE 30 CPU DOTHAN ATI M24 CSP64 D LVDS FAN + SENSOR Power On Sequence PAGE 3,4 PCIE X16 D PAGE 5 PAGE 40 PSB Startup Circuit PAGE 38,39 PAGE 12 Power Flowchart MCH-M Alviso LVDS PAGE 14 CRT DDR2 DDR2 SO-DIMM

AU-6433

Abstract: RTM875T MB39A132 IT8502 N10M-GE1 R0326 asus alcor au6433 RTM875T-336 8796G
Contextual Info: 5 4 3 2 UL50AT CLOCK GENERATOR RTM875T-336 Penryn SFF D 1 FAN & THERMAL SENSOR 956 uFCBGA D FSB 800MHz IO BOARD LVDS DDR3 SDRAM 800 MHz GS45 Express CRT 1363 uFCBGA HDMI Azalia STANDARD DDR3 DIMM REVERSE DDR3 DIMM DMI 2X ONLY C C IO BOARD SATA 2.5" HDD USB

S028

Abstract: ST6215C ST6225C ST62E25C ST62T15C T25C JRC 072 D o54100
Contextual Info: ST6215CM-Auto ST6225CM-Auto 8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET Memories – 2K or 4K bytes Program memory OTP, EPROM, FASTROM or ROM with read-out protection – 64 bytes RAM Clock, Reset and Supply Management – Enhanced reset system

jrc ic smd marking code

Abstract: diodes STmicroelectronics marking T01 AN899 ST6203C SSOP16 ST6200C ST6201C ST62P00C ST62T00C ST62T01C
Contextual Info: ST6200C/ST6201C/ST6203C 8-BIT MCUs WITH A/D CONVERTER, TWO TIMERS, OSCILLATOR SAFEGUARD & SAFE RESET • ■ ■ ■ ■ ■ ■ Memories – 1K or 2K bytes Program memory OTP, EPROM, FASTROM or ROM with read-out protection – 64 bytes RAM Clock, Reset and Supply Management

VTL9A10

Abstract: VTL9A9 Vactec cds cell vactrol vectrol 50C24 Single photocell Vactec VTL9B8 VTL9A1
Contextual Info: Powered n CO p> by o B» Bulletin VTL 9 DIMENSION D RAW IN GS V T L9 Series Bottom V iew Maximum case dissipation 5 400 mW — derate 10 mW/ *C above 35*C — case Maximum cell power 200 mW — derate 4 mW/'C above 25*C — case, Isolation voltage 500V Thermal resistance—

VT-200

Abstract: CL 2182
Contextual Info: 3826A 01-Jun-07 Evaluation of Subsystem Clock Oscillation Circuit [M3826AMFA-100P] LQFP 14x14 0.5mm pitch Measurement conditions :3.3V, 5.0V Model Vcc=1.8V to 5.5V :VT-200 Frequency :Fo=32.768kHz Frequency tolerance :dF/Fo= +/-20x10-6 Load capacitance :CL=6.0pF

WT11I-E-AI4

Contextual Info: WT11i-A DATA SHEET Monday, 09 September 2013 Version 1.60 Copyright 2000-2013 Bluegiga Technologies All rights reserved. Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual. Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications

220Kohm

Abstract: uPD78F0114M2GB-8ES
Contextual Info: 78K0/KC1 18-May-05 Evaluation of Subsystem Clock Oscillation Circuit [uPD78F0114M2GB-8ES] LQFP 10x10 0.8mm pitch Measurement conditions : 5.0V , 3.3V Model Vdd=2.7 to 5.5V :SSP-T7 Frequency :Fo=32.768kHz Frequency tolerance :dF/Fo= +/-20x10-6 Load capacitance