20L10A Search Results

aeg diode Si 11 K

Abstract: aeg diode Si 11 aeg Diode D6 aeg diode Si 11 n
Contextual Info: ADV MICRO P LA / P L E / A R R AY S It D E | 02S75EL. OOSTMST Û T-46-13-47 Zero Power CMOS Hard Array Logic ZHAL 24A Series Features/Benefits Ordering information • Zero standby power PART NUM BER • Low power operation PACKAGE • High-speed C M O S technology

PAL20X4ACNS

Abstract: palasm PAL20X10 MMI PAL20L10 MMI pal20x4a
Contextual Info: COM’L: A/B/-20/AL MIL: A PAL20X10A Series AmPAL20L10B/-20/AL Advanced Micro Devices XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • XOR gates on registered outputs Register preload for testability ■ Efficient implementation of counters

16L8L

Abstract: pal 22v10Q ecl pal 16 macrocells x6456 EPP-80
Contextual Info: 4.1 FIELD PROGRAMMABLE LOGIC SELECTOR GUIDE Features of PAL Devices Advantages of AMD PAL Devices • High speed electrically programmable array logic elements • User customizable logic patterns, generated in minutes with PROM type program­ mers • Improves performance and reduces board area and cost of existing TTL SSI/MSI

PAL20L10 MMI

Abstract: pal 007a PAL20X10 MMI PAL20X10 AMD part numbering DIAGRAM pal 005a pal 010a PAL20X8A odv marking pal 005a
Contextual Info: COM’L: A/B/-20/AL MIL: A a Advanced Micro Devices PAL20X10A Series AmPAL20L10B/-20/AL XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • XOR gates on registered outputs Register preload for testability ■ Efficient Implementation of counters

Contextual Info: PAL20X1OA Series 20L1OA, 2 0 X 1 OA 20X 8A , 20 X 4A Ordering Information F eatures/ Benefits • XOR gates on registered outputs PAL20X10A C NS STD • Efficient implementation of counters ~ n PR O G R A M M A B LE ARRAY L O G IC • Register preload • Power-up reset

Contextual Info: Zero Pow er CMOS Hard A rray Logic ZHAL 24A Series Features/ Benefits Ordering Information • Zero standby power PART NUMBER • Low power operation PACKAGE • High-speed CMOS technology OUTPUTS ARRAY INPUTS COMB REG • HC and HCT compatible ZHAL12L10A

PAL20L10

Abstract: 20L10 PAL20X10 PAL20X4 PAL20X8 List three types of PAL output logic
Contextual Info: 24-Pin Exclusive-OR PAL Family National ÆÂ Semiconductor Programmable Array Logic PAL 24-Pin Exclusive-OR PAL Family General Description The 24-pin Exclusive-OR PAL family contains four industrystandard PAL architectures optimized for a specific class of

MA01701

Abstract: ZHAL20R4
Contextual Info: Zero Power CMOS Hard Array Logic ZHAL 24A Series Patent Pending Ordering Information Features/ Benefits • Zero standby power • Low power operation OUTPUTS ARRAY INPUTS COMB REG PART NUMBER PACKAGE ZHAL12L10A NS, NL 12 10 — ZHAL14L8A NS, NL 14 8 - ZHAL16L6A

Contextual Info: Medium 2 4 X Series 2 0 L1 0 , 2 0 X 1 0 , 2 0 X 8 , 2 0 X 4 Medium 24X Series STANDARD OUTPUTS ARRAY INPUTS PAL20L10 PAL20X10 PAL20X8 PAL20X4 20 20 20 20 COMBINATORIAL REGISTERED 10 2 10 8 4 6 ns •cc (mA) (ns) Ice (mA) 50 50 50 50 165 180 180 180 30 30

pal8l14

Abstract: PAL20L8A-2 20L8-25
Contextual Info: M ilita ry 24-P in PAL D ev ic es Features Benefits • • • • • • • • • • • • • • • • • • • Registers with feedback Programmable three-state outputs Security fuse prevents duplication of logic Variety o f speed/power options available In same archi­

PAL 007 E

Abstract: 20L8A NL 714 mmi 20L8a 74ACT461 18L4A
Contextual Info: Z ero P o w er CM OS H ard A rra y Logic ZHAL 24A S eries Patent Pending Ordering Information F e a tu res / Benefits • Zero standby power O U TPU TS ARRAY INPUTS COM B REG PART NUMBER PACKAGE ZH AL12L10A NS, NL 12 10 - ZHAL14L8A NS, NL 14 8 — • Low power alternative for most 24-pin PAL devices,

PAL20L10ACNS

Abstract: OB2520 PAL20L10A PAL20X8A PAL20L10AMJS 20L10 PAL20L10 PAL20X10A PAL20X4A 1ll2
Contextual Info: MIL: A COM’L: A/B/-20/AL PAL20X10A Series AmPAL20L10B/-20/AL Advanced Micro Devices XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • XOR gates on registered outputs Register preload for testability ■ Efficient Implementation of counters

NATIONAL PAL20L10

Contextual Info: National Semiconductor Programmable Array Logic PAL 24-Pin Exclusive-OR P A L Family General Description The 24-pin Exclusive-OR PAL family contains four industrystandard PAL architectures optimized for a specific class of applications. National Semiconductor’s advanced Schottky

20l10

Abstract: 20L10A LT3973-3.3 20X4 12L10 16L6 20C1 20X4A LT3971-3.3
Contextual Info: 24-Pin PAL/HAL Devices 12L10 E ^7^ 3 E=E> 3 E= t> 3 E =E> 3 E - AND =E> 3 LOGIC = 0 3 E - nnnnv E:£ > 3 E = 0 3 E=E> 3 E= 0 3 E = I> 3 E 1 3 20L2 14L8 d E E E E E E E E E E E AND LOGIC ARRAY E 3 3 3 =L> 3 = 0 3 =L> IE =T> 3 = o 13 3 O ID AND LOGIC ARRAY 13

Contextual Info: Zero Power CM OS Hard A rray Logic Z H A L 2 4 A Series Ordering Information Features/Benefits • Zero standby power • Low power operation PACKAGE ZHAL12L10A NS, NL 12 10 — ZHAL14L8A 8 — • High-speed CMOS technology • HC and HCT compatible • 24-pin SKINNYDIP and 28-pin PLCC packages save

16X4/A4

Abstract: pal20s PAL20S10 pal8l14 PAL20RS8 S/PAL16A4 PAL8L14A
Contextual Info: MONOLITHIC MEMORIES INC t.8 t30Bm D QQQ5M“17 5 § D PAL Programmable Array Logic Devices HAL® (Hard Array Logic) Devices Features/Benefits In addition the PALVHAL device provides these options: • Reduces SSI/M SI chip count greater than 5 to 1 • Variable input/output pin ratio

PAL20L10 MMI

Abstract: fl024 package MARKING T46 pal20l10 PAL20X4ACNS socket amd2
Contextual Info: ADV MI CRO PLA/PLE/ARRAYS gfi E C O M ’ L: A/B/-20/AL D 1 02S 7S 2b MIL: A a a a 'is Q b IA M D S i T—46— 19— 13 PAL20X10A Series AmPAL20L10B/-20/AL Advanced Micro Devices XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS

PAL20X10ACNS

Abstract: PAL20L10A
Contextual Info: PAL20X10 A Series 2 0 L 10 A, 2 0 X 10 A 2 0 X 8 A ,2 0 X 4 A Ordering Information Features/ Benefits • XOR gates on registered outputs PAL20X10A C NS STD • Efficient Implementation of counters PRO GRAM M ABLEi A R R A Y L O G IC • Register preload r

PAL20X10ACNS

Abstract: 20X8A PAL20L10A 20X4A pal20x4a
Contextual Info: ADV niCRO P L A / P L E / A R R A V S It PAL20X1OA Series ¡SÈI Q2S7521, 0027171 8 T-46-13-47 20L1OA, 20X1OA 20X8A, 20X4A Ordering Information Features/ Benefits • XOR gates on registered outputs PAL20X10A C NS STD • Efficient implementation of counters

PAL20L10

Abstract: PAL20X10 PAL20X10 equivalent PAL20X4 PAL20X8 lj13 PAL 007 diagrams PAL20L10A PAL20X4A 999810
Contextual Info: 24-Pin Exclusive-OR PAL Family Vgk National Æüà Semiconductor Programmable Array Logic PAL 24-Pin Exclusive-OR PAL Family General Description The 24-pin Exclusive-OR PAL family contains four industrystandard PAL architectures optimized for a specific class of

5962-87530

Abstract: PAL20S10 pal8l14 PAL20RS10 12L10 PAL32VX10 PAL14L8 16L6 PAL8L14A 8L14A
Contextual Info: M ilita ry 24-P in PAL D evices Features Benefits • • • • • • • • • • • • • • • • • • • R eg isters w ith fe ed back P rogram m able th re e-s ta te ou tputs S ecurity fuse p re ve n ts d u plicatio n o f logic V ariety o f s p e e d /p o w e r o p tio n s ava ila b le In sam e a rc h i­

pal 013a

Abstract: PAL20L10ACNS OO3A MARKING pal 005a pal 007a PAL20L10 MMI PAL20L10AMJS palasm 20L10B PAL 002a
Contextual Info: ADV MI CRO PLA/PLE/ARRAYS gfi E C O M ’ L: A/B/-20/AL D 1 02S 7S 2b MIL: A a a a 'is Q b IA M D S i T—46— 19— 13 PAL20X10A Series AmPAL20L10B/-20/AL Advanced Micro Devices XOR Registered 24-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS

20X4

Abstract: 20x8 20L10 PAL20L10 PAL20X10 PAL20X4 PAL20X8
Contextual Info: M edium 2 4 X S c rie s 20L 10, 20X 10, 20X 8, 20X 4 Medium 24X Series STANDARD OUTPUTS ARRAY INPUTS PAL20L10 PAL20X10 PAL20X8 PAL20X4 20 20 20 20 HIGH SPEED COMBINATORIAL REGISTERED tpo ns •cc (mA) *PD (ns) ■cc (mA) 10 2 6 10 8 4 50 50 50 50 165 180

mmi 20L8a

Abstract: 20R4A
Contextual Info: Z ero P o w e r CMOS Hard A rra y Logic ZHAL 2 4 A S eries Ordering Inform ation F eatures/B enefits • Z ero standby pow e r • Low pow e r opera tio n • OUTPUTS ARRAY INPUTS COMB REG PART NUMBER PACKAGE Z H A L 12 L 1 0A NS, NL 12 10 — NS, NL 14