PAL32VX10 Search Results

PAL32VX10

Contextual Info: COM’L Advanced Micro Devices PAL32VX10/A 24-Pin Versatile with XOR Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Increased logic power ■ Global register asynchronous/synchronous preset/reset ■ Automatic register preset on power up ■ Preloadable output registers for testability

Contextual Info: COM’L E PAL32VX10/A 24-Pin Versatile with XOR Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Increased logic power - Up to 32 inputs and 10 outputs Global register asynchronous/synchronous preset/reset ■ Dual Independent feedback paths allow buried

PAL32VX10

Abstract: PAL32VX10C
Contextual Info: High Speed Programmable Array Logic PAL32VX1O PAL32VX10A Ordering Information Features/B enefits • Dual independent feedback paths allow buried state registers or input registers PAL32VX10A C NS STD • Program m able flip-flops allow J-K, S-R , T or D types for the

Contextual Info: High Speed Programmable Array Logic PAL32VX10 PAL32VX10A Ordering Information Features/ Benefits • Dual independent feedback paths allow buried state registers or input registers • Programm able flip-flops allow J-K , S-R, T or D types for the most efficient use of product terms

Contextual Info: ADV MICRO P L A / P L E / A R R A Y S Military Programmable Array Logic 13E D | 0257551, 0027*173 Q | P A L 3 2 V X 10 T M k .v m P A L 3 2 V X 1 OA a •n > High Speed Programmable Array Logic Conforms to MIL-STD-883, Class B* £ ro < DISTINCTIVE CHARACTERISTICS

PAL29M16

Abstract: PLS105 PLS151 pls103 pls155 AMD PAL18P8 EP1200 PAL18P8 gal programming specification PAL32R16
Contextual Info: MATRA DESIGN SEMICOND 1ÌE D • 53^6455 MAXRA DESIGN SEMIOONDUCTOR d ia lis i b ■ UNIVERSAL LOGIC CIRCUIT ULC (tm) DEVICES i [p ir s D O o ifiiflo m ir ^ 0001037 fln o o ti August 1989 T -^ Z -W -O o i FEATURES Factory-customized pin- and function-compatible replacements for

pal8l14

Abstract: PAL20L8A-2 20L8-25
Contextual Info: M ilita ry 24-P in PAL D ev ic es Features Benefits • • • • • • • • • • • • • • • • • • • Registers with feedback Programmable three-state outputs Security fuse prevents duplication of logic Variety o f speed/power options available In same archi­

PAL16l8A MMI

Abstract: PAL16l8 MMI M2018 pal16r6b PAL20L10 MMI PAL16L8A PAL20S10 PAL16L8A4 AL20S MMI PAL14L8
Contextual Info: Military PAL Devices Monolithic Memories’ Military Programmable Array Logic PAL devices provide state machine and combinatorial logic solutions processed to military criteria. We offer the largest number of JAN 38510 and Standard Military Drawing PAL products in the

mhs ulc

Abstract: PAL29M16 PLS100 fpla gal programming timing chart PLS101 PLUS405 matra universal logic circuit
Contextual Info: 4 TE D • SflbflMSb 0 0 D 1 D 0 S 73b ■ MMHS MATRA Preliminary llllr iilll I W I n H H l M H S November 1990 OPENASIC DATA SHEET_ UNIVERSAL LOGIC CIRCUIT ULC (tm) DEVICES FEATURES . FACTORY-CUSTOMIZED PIN- AND FUNCTIONCOMPATIBLE REPLACEMENTS FOR FIELDPROGRAMMABLE PAL(tm), GAL(lm), FPLA, AND

PALC16L8Q

Abstract: PAL20RP4B 8Z35 L16R ic 5209 L16L8A 6R6D PALC20L8 pal8l14 PAL10L8
Contextual Info: PAL/PLD D evice Menu STANDBY SPEED tpo in ns (m&) DATA S H E E T P A G E NO. IN PUTS OUTPUTS PRODUCT T E R M S /O U T P U T PAL8L14A PAL6L16A 8 6 14 16 1 1 25 25 90 90 5-141 5-141 PAL10H8 PAL12H6 PAL14H4 PAL16H2 PAL10L8 PAL12L6 PAL14L4 PAL16L2 PAL16C1 10

Monolithic Memories

Abstract: 32vx10 palasm PAL32VX10 SSI MSI macrocell
Contextual Info: High Speed Programmable Array Logic P A L3 2 V X 1 0 M onolithic s i a M e m o rie s P A L3 2 V X 1 0 A U.S. Patent 4124899 / / / / / / / //////////////////////////////////////ADVANCE INFORMATION Features/ Benefits Logic Symbol • 10 input/output macrocells

ORCAD BOOK

Abstract: PLD-10 programmer EPLD 22p10 PAL assembler PALASM S3 VIA XC7372 2 bit magnitude comparator using 2 xor gates 22v10 pal DISPLAY 20X4 20 PINS
Contextual Info: ON LIN E R XEPLD REFER E NCE G UI DE TABL E OF CONT ENT S INDEX GO T O OT HER BOOKS 0 4 0 1416 Copyright 1994-1995 Xilinx Inc. All Rights Reserved. Contents Chapter 1 XEPLD Functional Description Product Description.

16X4/A4

Abstract: pal20s PAL20S10 pal8l14 PAL20RS8 S/PAL16A4 PAL8L14A
Contextual Info: MONOLITHIC MEMORIES INC t.8 t30Bm D QQQ5M“17 5 § D PAL Programmable Array Logic Devices HAL® (Hard Array Logic) Devices Features/Benefits In addition the PALVHAL device provides these options: • Reduces SSI/M SI chip count greater than 5 to 1 • Variable input/output pin ratio

PAL16R4B

Abstract: PALCE22V100-25 PAL16l8 MMI PAL16l8A MMI PAL24 4126P pal20r4b PAL20L10A TTL 555 PAL16L8B-4
Contextual Info: PAL Device/ Sequencer/FPGA Menu Standard PAL Devices Family 16R8 Package Technology Inpula I/O Outpula Product Term »/Output PAL16L8-7 PAL16R8-7 PAL16R6-7 PAL16R4-7 20P.D.J TTL 10 8 8 8 6 Comb 2 Comb 8 Reg 6 Reg 4 Reg 7 8 7.8 7.8 PAL16L8D PAL16R8D PAL16R6D

5962-87530

Abstract: PAL20S10 pal8l14 PAL20RS10 12L10 PAL32VX10 PAL14L8 16L6 PAL8L14A 8L14A
Contextual Info: M ilita ry 24-P in PAL D evices Features Benefits • • • • • • • • • • • • • • • • • • • R eg isters w ith fe ed back P rogram m able th re e-s ta te ou tputs S ecurity fuse p re ve n ts d u plicatio n o f logic V ariety o f s p e e d /p o w e r o p tio n s ava ila b le In sam e a rc h i­