20CERDIP Search Results
20CERDIP Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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din 7184Contextual Info: 19- 1179; Rev 0; 1/97 V M / X IA I 5V, 8-Channel, S erial, 10-Bit ADC w ith 3 V D ig ita l In te rfa c e A 4 -w ire s e ria l in te rfa c e c o n n e c ts d ire c tly to SPI /Microwire™ devices without external logic, and a s e ria l s tro b e o u tp u t a llo w s d ire c t c o n n e c tio n to |
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10-bittms320-familymax1204aeppmax1204bepp+6 | |
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Contextual Info: 19-1976; Rev 1;6/92 y n y j x iy n CMOS [iP-Compatible, 5|iS, 8-B it ADCs G e n e ra l D e s c rip tio n . ♦ 5|xs Conversion Time The MAX165/MAX166 are easily interfaced to all popular 8-bit |xPs through standard CS and RD control signals. These signals control the start of conversions and data access. A |
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50khz165/mmax165/max16620cerdip+3 | |
FSR02Contextual Info: KT8555 TIME SLOT ASSIGNMENT CIRCUIT INTRODUCTION 20-CERDIP The KT8555 is a per channel Time Slot Assignment Circuit TSAC that produces 8-bit receive and transmit time slots for four 1 CHIP CODEC. Each frame synchronization pulse may be independently assigned to a time slot in a frame of up to 84 time slots. |
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kt855520-cerdipkt8554/7kt8555j+2 | |
FSR02Contextual Info: TIME SLOT ASSIGNMENT CIRCUIT S5T8555 INTRODUCTION 20-CERDIP The S5T8555 is a per channel Time Slot Assignment Circuit TSAC that produces 8-bit receive and transmit time slots for four 1 CHIP CODEC. Each frame synchronization pulse may be independently assigned |
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s5t855520-cerdips5t8554b/7bs5t8555x01-l0b0+3 | |
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Contextual Info: TIME SLOT ASSIGNMENT CIRCUIT KT8555 INTRODUCTION The KT8555 is a per channel Time Slot Assignment Circuit TSAC that produces 8-bit receive and transmit time slots for four 1 CHIP CODEC. Each frame synchronization pulse may be independently assigned to a time slot in a frame of up to 84 time slots. |
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kt8555kt8554/7kt8555j20-cerdip+1 | |
DS00092
Abstract: embedded control handbook rf transmitter and receiver pic DS00711 PIC PROGRAMMER
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rfpic12c509ag/afrfpic12c509ag18-pinrfpic12c509af+7 | |
max506acppContextual Info: 19-0021;Rev2; 1ß4 Quad 8-Bit DACs with Raii-to-Rail Voltage Outputs _ F e a tu r e s ♦ Operate from Single +5V SLpply of Dual ±5V Supplies Offset, gain, and linearity are factory calibrated to provide 1LSB total unadjusted error TUE over the full operating |
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x505/mmax505max50624-pin+1 | |
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Contextual Info: 19-0123; Rev. 4; 8/96 ;W Low-Power, 8-Channel, Serial 12-Bit ADCs able. Features General Description The 4-wire serial interface directly connects to SPI , QSPI™ and Microwire™ devices without external logic. A serial strobe output allows direct connection to TMS320 |
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12-bittms320maxi86/max188max186+2 | |
max166
Abstract: MAX165 MAX165ACPN MAX165AEPN MAX165BCPN MAX165BCWN MX7575 MAX165BCWN T TL 4049 20-CERDIP
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165/max16650kh2386mv/max165/max166+13 | |
LTA 902
Abstract: MAX903C/LTA 902 MAX900A
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max900-903max900/901/902/903lta 902max903c/lta 902+1 | |
MC44131
Abstract: EIA-232 16P-DIP 20-SOG 20-CERDIP v21 modem motorola comb filter 16-SOG
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mc145480mc14550220-sog20-pdip+12 | |
max2758
Abstract: MAX276 MAX2758CPP 414x cga to vga by pic MAX274 MAX274ACNG MAX274ACWI MAX274BCNG MAX274BCWI
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max274max275max274/max275max2758+8 | |
M3MAContextual Info: KT85S5 TIME SLOT ASSIGNMENT CIRCUIT INTRODUCTION 20-CERDiP The KT6555 is a per channel Time Slot Assignment Circuit TSAC that produces 8-bit receive and transmit time slots for four 1 CHIP CODEC. Each frame synchronization pulse may be independently assigned to a time slot in a frame of up to 84 time slots. |
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kt85s520-cerdipkt6555kt8564/7+5 | |
IC 4049
Abstract: S3201 MAX166
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386mv/ax165/max166max165max166+6 |