16PLAC Search Results

AMP D-3100

Abstract: D3100 D-3100 30HS APP-20
Contextual Info: ["• N m 1 2 3 4 26.67 CO.8 oo i> TAB CONTACT OUTLINE OF H E A D E R H OU SI N G ± 0.1 2-02 □ IA 2 ± 0 . 1 5 0 y h ' ROUND 2PLACES 2-0 3 M IN D IA3M IN 2PLACES ±0.1 16 - 01,1 AMP 40.67 17 D I A 1. 1 ± 0 . 1 / 16PLACES Ml - t t - 0 U E PC RE C O ME N D PC B O A R D HOL E P A T T E R N

Contextual Info: 3 A 2 1 [N- * 0 .0 5 O on CO IN- 3 4 .2 9 •<- 4 0 . 6 7 - »*• OUTLINE OF HEADER HOUSING — LÏ! Sf: Lèi [fei S ’: I?: SI ¿i L8! ± 0. I 2 0 -0 1 .7 D I A 7. 7 ± 0 . 1 16PLAC E5 o rsi o■« X

SN10000

Abstract: SN10139 SN10139J SN10140 SN10142 SN10144 SN10145 SN10145JE SN10147 SN10148
Contextual Info: SERIES SN10000 MEMORIES Eel INTEGRATED CIRCU ITS BULLETIN NO. DL-S 7512255, MAY 1975 • Full On-Chip Address Decoding and Output-Sense Amplification • Constant Current Drain Over a Wide Supply Voltage Range • Logic Levels Compatible with Series SN10000 Logic Levels

SN10139

Abstract: SN10139J SN10145JE SN10000
Contextual Info: TYPE SN10139 256-BIT PROGRAMMABLE READ-ONLY MEMORY APRIL 1975 • 32-Word-by-Eight-Bit Organization • Full On-Chip Address Decoding and Output-Sensing Amplification • Capability for Wired-OR Connections • Easy Programming J OR JE DUAL-IN-L1NE PACKAGE TOP VIEW

SN10139J

Abstract: SN10144 SN10145JE
Contextual Info: TYPE SN10144 256-811 RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time . 18 ns Typical • 256-Word-by-One-Bit Organization • Drives 50-Ohm Loads • Full On-Chip Address Decoding and Output-Sense Amplification • • J OR JE DUAL-IN-LiNE PACKAGE TOP VIEW

B-3067

Abstract: LPB-5015 B-3067 TRANSFORMER HLP-6002 HLP-6001 HLP-6015 lpb 5015 LPB-5008 DLP-7015 B-3072 TRANSFORMER
Contextual Info: £ ¡ § Ü d. v.c. pulse tr a n sfo r m er s ILC DATA DEVICE CORPORATION PULSE TRANSFORMER CROSS-REFERENCE LIST Pin#’* Turn* -Epoxy Und -Epoxy UnH- Epoxy UnH Epoxy Unit -Epoxy Unit - Epoxy Unit - Epoxy Unit -Epoxy Unit -Epoxy UnH -Matai UnH -MatalUnK TranaRatto •PC Mount -Flatpack -Surface ML -Flatpack • Surface Mt -Flatpack -SurfaoaML -Flatpack - Surfaca Mt -Flatpack -SurfaoaML calvar

NSN33

Abstract: mm5725 calculator chip 5725/6AS6W/6I87
Contextual Info: M M 5725 M S Complex Standards M M 5 7 2 5 one chip calculator general description The M M 5725 is an 8 -d ig it calculator o n one MOS/ LSI ch ip . It uses three registers to provide th e fo u r a rith m e tic fu n ctio n s +, x, and -r . The calculator

ay-5-1012

Abstract: ali m 3329 PROCESSOR ALI 3329 ali 3329 b ali 3329 SN74188 sn74s188 str 52100 SN7452 replacement of bel 187 transistor
Contextual Info: GENERAL INFORMATION lie of Contents • Alphanumeric Index • Selection Guides • Glossary INTERCHANGEABiliTY GUIDE MOS MEMORIES TTL MEMORIES ECl MEMORIES MICROPROCESSOR SUMMARY 38510/MACH IV PROCUREMENT SPECIFICATION JAN Mll-M-38510 INTEGRATED CIRCUITS

signal strength meter

Abstract: DS968 MC13055 MC3356 C41722
Contextual Info: Order this data sheet by MC13055/D MC13055 WIDEBAND FSK RECEIVER The MC13055 is intended for RF data link systems using carrier frequencies up to 40 MHz and FSK frequency shift keying data rates up to 2.OM Baud (1.0 MHz). This design is similar to the MC3356, except that it does not include the oscillator/mixer. The

SN10139J

Abstract: SN10145 SN10145JE
Contextual Info: TYPE'SN10145 64-BIT RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time . 9 ns Typical • 16-Word-by-Four-Bit Organization • Drives 50-Ohm Loads • Full On-Chip Address Decoding and Output-Sense Amplification • Capability for Wired-OR Connections •

SN10000

Abstract: SN10139J SN10140 SN10142 SN10145JE SN10148
Contextual Info: TYPES SN10140, SN10142, SN10148 64-BIT RANDOM-ACCESS MEMORIES MAY 1975 • SN10140 Drives gO-Ohm Loads • SN10142 and SN10148 Drive 50-Ohm Loads • Fast Access Times: 10 ns Max SN10142 15 ns Max (SN10140, SN10148) • 64-Word-by-One-Bit Organization •

SN1000

Abstract: SN10139J SN10145JE SN10147
Contextual Info: TYPE SN10147 128-811 RANDOM-ACCESS MEMORY MAY 1975 • Fast Access Time _ 15 ns Maximum • 128-Word-by-One-Bit Organization • Full On-Chip Address Decoding and Output-Sense Amplification • Capability for Wired-OR Connections • J OR JE DUAL-IN-L1NE PACKAGE TOP VIEW