143 TGG Search Results

condensatori elettrolitici

Abstract: condensatori ELP200 35X79 IEC 384 14 250 volts iec 384 din 74 condensatori 1.27 ELP 330 ELP 330 M 200 V
Contextual Info: SERIE ELP ELP CONDENSATORI ELETTROLITICI PER ELETTRONICA DI POTENZA D 35 35 35 51 51 63 76 76 L 51 79 105 79 105 105 105 143 SERIES ELECTROLYTIC CAPACITORS FOR POWER ELECTRONICS M 12.7 12.7 12.7 22.2 22.2 28.6 31.8 31.8 S M8 M8 M8 M12 M12 M12 M12 M12 H 12

transistor 1PN

Abstract: Hitachi 64180 z80-pio Z8S180 datasheet z80 Z64180 z80 dma Z641800 Hitachi DSA00505
Contextual Info: 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 <5<. '0*#0%'& < /+%41241%'5514 1('45 (#56'4 ':'%76+10 219'45#8'4 /1&' .19 '/+ ('#674'5 Code Compatible with ZiLOG Z80 CPU Two 16-Bit Counter/Timers Extended Instructions Two Enhanced UARTs (up to 512 Kbps

Z64180

Abstract: Hitachi 64180 Z641800 transistor 1PN Z80 instruction set Hitachi DSA0071
Contextual Info: 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 <5<. '0*#0%'& < /+%41241%'5514 1('45 (#56'4 ':'%76+10 219'45#8'4 /1&' .19 '/+ ('#674'5 Code Compatible with ZiLOG Z80 CPU Two 16-Bit Counter/Timers Extended Instructions Two Enhanced UARTs (up to 512 Kbps

Contextual Info: 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 <5<. '0*#0%'& < /+%41241%'5514 1('45 (#56'4 ':'%76+10 219'45#8'4 /1&' .19 '/+ ('#674'5 Code Compatible with ZiLOG Z80 CPU Two 16-Bit Counter/Timers Extended Instructions Two Enhanced UARTs (up to 512 Kbps

V658

Abstract: transistor 1PN Z641800 Hitachi 64180
Contextual Info: 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 <5<. '0*#0%'& < /+%41241%'5514 1('45 (#56'4 ':'%76+10 219'45#8'4 /1&' .19 '/+ ('#674'5 Code Compatible with ZiLOG Z80 CPU Two 16-Bit Counter/Timers Extended Instructions Two Enhanced UARTs (up to 512 Kbps

A1 GNC

Contextual Info: 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 <5<. '0*#0%'& < /+%41241%'5514 1('45 (#56'4 ':'%76+10 219'45#8'4 /1&' .19 '/+ ('#674'5 Code Compatible with ZiLOG Z80 CPU Two 16-Bit Counter/Timers Extended Instructions Two Enhanced UARTs (up to 512 Kbps

Contextual Info: 4 -0 ^0 ~ n ypnnU E H R / v - 7 * . n — =* ^ i u j j 10 to 1000 MHz j o -8 Cascadable Amplifier Outline Drawings A C 101 7 High Output Level . + 15.2 dBm High Third Order I. P. .

Contextual Info: MODULAR JACK SHIELDED BOARD MOUNT RIGHT ANGLE - LOW PROFILE ASSMANN E L E C T R O N IC S , IN C ., V .S .A .^-= z FEATURES AND OPTIONS - Available in 6 or 8 positions - Designed for easy mounting and board cleaning - Black polyester housing is UL recognized

z80-sio

Abstract: SPF8 Z80SIO application zilog z80ctc
Contextual Info: <5 '0'4#.274215' +06')4#6'& /+%41241%'5514 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 25</2 <K.1) 9IRF8WC89 *958QU5RT9RS  ' *5GCFTIH #V9HU9 %5GP69FF %#  69F9PBIH9  (5X  +HT9RH9T BTTPWWW<C.1)7IG 24'.+/+0#4;

ZKP 180

Abstract: I89S Z80SIO 202 ctc diode ZKP Hitachi 64180 manual qt41 TT 2146 BERG CONNECTOR 6cta
Contextual Info: <5 '0'4#.274215' +06')4#6'& /+%41241%'5514 24'.+/+0#4; 241&7%6 52'%+ +%#6+10 25</2 <K.1) 9IRF8WC89 *958QU5RT9RS  ' *5GCFTIH #V9HU9 %5GP69FF %#  69F9PBIH9  (5X  +HT9RH9T BTTPWWW<C.1)7IG 24'.+/+0#4;

IQ160

Abstract: IDS200 TLR 308 IQ128B IQ240B IQ320 IQ32B IQ48 IQ64B IQ96
Contextual Info: Introduction This manual describes the architecture o f the IQ family of integrated circuit chips, which includes the IQ320, IQ240B, IQ160, IQ128B, IQ96, IQ64B, IQ48, and IQ32B part types. Each IQ device implements a non-blocking switch matrix. Each signal line in

Contextual Info: Introduction This manual provides the information needed to configure the IQX Family devices using the JTAG interface. It is intended for users who plan to write their own code to configure the IQX devices. In addition, this manual explains how the boundary scan features implemented in the IQX devices can be used

Contextual Info: P 7 M-Cfbol 7/92 ^ O D U E H R 1 / \ ß~7V-/3-5l 2225-K Martin Avenue, Santa Clara, CA 95050 FAX C O M P O N E N T S r i . f X J ù~ì^U ' 0-s 408 492-1400 (408)492-1500 10 to 1200 MHz jo -8 Cascadable Amplifier AC1264 (Typical Values) High Gain .

74HTC244

Abstract: TCK9002 TCK9004 640X400 Stn 640x200 mono 3c509 Tvga 386SX chipset Hsync Vsync RGB LCD laptop TVGA9100B
Contextual Info: T R I D EN T M I C R O S Y S T E M S INC blE » • ^ 0 0 2 1 0 2 OOOÜG'i? bñ3 « T R I D // T L C D 9 1 0 0 B P R E L I M I N A R Y D A T A SHEET Ii — -S Z L -3 3 -4 5 * / Trident TLCD9100B LCD/CRT CONTROLLER Benefits Features Single-chip solution for IBM PC/AT and compatible,

74HC273

Abstract: vhc 273 msc 5511 2VA5-5 VHC273 volvo D2 74VHC273 74VHC273M 74VHC273MSCX 74VHC273MX
Contextual Info: 74VHC273 Octal D Flip-Flop General Description Features The VHC273 is an advanced high speed CMOS Octal D-type flip-flop fabricated with silicon gate CMOS technolo­ gy. It achieves the high speed operation similar to equiva­ lent Bipolar Schottky TTL while maintaining the CMOS low

I-CUBE

Abstract: P103t zener diode phc 16 ZENER diode p317 AB P89 zener PLK3210 hk30 transistor 4287 AB zener phc 12 kck 223
Contextual Info: SH5 I-Cube* IQX Family Data Sheet Description Features The IQX family of SRAM-based bit-oriented switching devices is manufactured using a 0.6vim CMOS process. These devices offer clock speed of up to 150 MHz and fastest pin-to-pin delay of 6 ns. • SRAM-based, in-system programmable

DP142

Abstract: p139d E2p 49 transistor Transistor z3p tbh 12-38 transistor BJ 102 131 E2p 98 transistor ND1220 pj 75 sx 34
Contextual Info: € E I " C l l b O P S X F a m ily D a ta S h e e t D escription Features • SR A M -based , In -system Program m able • Sw itch M atrix - N on-Blocking - Program m able Bus W idths of 4 ,8 ,1 6 and 32 bits - Id entical and Predictable D elays - O ne-to-O ne, O n e-to-M an y and M any-toO n e C onnections

asus a6000

Abstract: LTS 543 10 pin common cathode display 686 ami bios ami bios 686 TSENG LABS schematic diagram cga to vga converter LTS 543 10 pin common cathode, 7 segment display ami bios 386 DX 40 tseng asus schematic diagram
Contextual Info: Data Book G R A P H I C S B Y TSENG L A B Copyright Tseng Labs, Inc. 1994 TDDblbS DQQDBTS 3fll S L A B S ET4000/W32p Data Book Errata 7/7/94 Data Book Publication Date 3/94 1.4/11/94 - Figure 2.12-2 ET4000/W32p Queued Registers and ACL Internal State found on page 30

Contextual Info: IB M 1 1 M 4 7 3 5 C IB M 1 1 M 4 7 3 5 C B 4M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for ECC applications • System Performance Benefits: - • 4Mx72 Extended Data Out Page Mode DIMM • Performance:

Contextual Info: IBM11M8645H 8M x 64 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • Optimized for ECC applications • System Performance Benefits: • 8Mx64 Extended Data Out Mode DIMM -Buffered inputs except RAS, Data • Performance:

T3D 64

Contextual Info: IB M 1 1 M 2 6 4 5 H IB M 1 1 M 2 6 4 5 H B 2M x 64 DRAM MODULE »HiMln»! . Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module • System Performance Benefits: -Buffered inputs except RAS, Data • 2Mx64 Extended Data Out Page Mode DIMM

G00274

Contextual Info: IB M 1 1 M 8 7 3 5 H 8M x 72 DRAM MODULE Features • 168 Pin JEDEC Standard, 8 Byte Dual In-line Memory Module Optimized for ECC applications • 8Mx72 Extended Data Out Mode DIMM -Buffered inputs except RAS, Data -Reduced noise (32 Vss/Vcc pins) -Buffered PDs

Contextual Info: IBM11T2640H 2M x 64 144 PIN SODIMM Features • 144 Pin JEDEC Standard, 8 Byte Small Outline Dual In-line Memory Module with 8 Byte busses - Reduced noise 18 Vss/18Vcc pins - Byte write, byte read accesses - Serial PDs • Performance: -60 -70 60ns 70ns

trw 8040

Contextual Info: IBM11M16735B/C 16M X 72 DRAM MODULE Features • 1 6 8 Pin J E D E C S tandard, 8 Byte D ual In-line M em ory M odule - Buffered inputs except R A S, D ata • 1 6 M x 7 2 E xtended D a ta O u t M o d e D IM M s - R educed noise (3 2 V s s /V c c Pins) •