128KX8 CMOS SRAM 600MIL Search Results

EDI88130C100PI

Contextual Info: m EDI88130C-RP a • ElfCTHONC CC9GN& NC 128Kx8 Ruggedized Plastic SRAM 128Kx8 Static RAM CMOS, Monolithic F e a tu r e s The EDI88130C is a ruggedized plastic, monolithic Static 128Kx8 bits Monolithic CMOS Static RAM organized as 128Kx8 bits. Random Access Memory

Contextual Info: A S7C 1024 AS7C 1024L High Performance 128Kx8 CMOS SRAM "PRELIMINARY" 128Kx8 CMOS SRAM Common I/O FEATURES • Organization: 131,072 words x 8 bits • Easy M emory Expansion with C E1, CE2 and OE Options • High Speed: 15/20/25/35 ns Address access time

7085NS

Abstract: 88128 5962-89598 EDI88128C EDI88128LP EDI88130 EDI88130C EDI88130LP
Contextual Info: White Electronic Designs EDI88128C 128Kx8 MONOLITHIC SRAM, SMD 5962-89598 The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. FEATURES Access Times of 70, 85, 100ns The device is also available as EDI88130C with an

5962-89598

Abstract: 88128 EDI88128C EDI88128LP EDI88130 EDI88130C EDI88130LP 7085NS
Contextual Info: EDI88128C HI-RELIABILITY PRODUCT 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES • Access Times of 70, 85, 100ns The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. ■ Available with Single Chip Selects EDI88128 or Dual Chip

Contextual Info: EDI88128C HI-RELIABILITY PRODUCT 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES • Access Times of 70, 85, 100ns The EDI88128C is a high speed, high performance, Monolithic CMOS Static RAM organized as 128Kx8. ■ Available with Single Chip Selects EDI88128 or Dual Chip

EDI88128CS

Contextual Info: EDI88128CS HI-RELIABILITY PRODUCT 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES • Access Times of 15*, 17, 20, 25, 35, 45, 55ns The EDI88128CS is a high speed, high performance, 128Kx8 megabit density Monolithic CMOS Static RAM. ■ CS and OE Functions for Bus Control

5962-8959

Contextual Info: EDI88128CS HI-RELIABILITY PRODUCT 128Kx8 Monolithic SRAM, SMD 5962-89598 FEATURES • Access Times of 15*, 17, 20, 25, 35, 45, 55ns The EDI88128CS is a high speed, high performance, 128Kx8 megabit density Monolithic CMOS Static RAM. ■ CS and OE Functions for Bus Control

Utron Technology

Abstract: UT62L1024 UT62L1024PC-35L UT62L1024PC-35LL 128Kx8 cmos sram 600mil
Contextual Info:  UTRON Rev. 1.9 UT62L1024 128KX8 BIT LOW POWER CMOS SRAM REVISION HISTORY REVISION Rev. 1.0 Rev. 1.1 Rev. 1.2 Rev. 1.3 Rev. 1.4 Rev. 1.5 Rev. 1.6 Rev. 1.7 Rev. 1.8 Rev. 1.9 DESCRIPTION Original 128Kx 8 Low Voltage CMOS SRAM 之TN8106 body 已作fine tunings,將

K6X1008C2D-GF55

Abstract: k6x1008c2d-pf55 K6X1008C2D-GF70 k6x1008c2d-bf55 K6X1008C2D-DF55 K6X1008-C2D-BF55 K6X1008C2D-BF70 samsung k6x1008c2d K6X1008C2D-TF70 K6X1008C2D
Contextual Info: K6X1008C2D Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Initial draft July 15, 2002 Preliminary 0.1 Revised - Deleted 32-TSOP1-0820R Package Type. - Added Commercial product.

K6X1008C2D-GF70

Abstract: K6X1008C2D-PQ701 55ns K6X1008C2D K6X1008C2D-DF55 K6X1008C2D-GF55 K6X1008C2D-TF70 K6X1008C2D-B K6X1008C2D-F K6X1008C2D-Q
Contextual Info: K6X1008C2D Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Initial draft July 15, 2002 Preliminary 0.1 Revised - Deleted 32-TSOP1-0820R Package Type. - Added Commercial product.

K6X1008C2D-GF55

Abstract: K6X1008C2D-TF55 K6X1008C2D-TB55 K6X1008C2D-F samsung k6x1008c2d K6X1008C2D-TF70
Contextual Info: Preliminary CMOS SRAM K6X1008C2D Family Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Initial draft July 15, 2002 Preliminary 0.1 Revised - Deleted 32-TSOP1-0820R Package Type. - Added Commercial product.

Contextual Info: CMOS SRAM KM681000BL / L-L 128Kx8 Bit High Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION • Fast Access Time : 55,70 ns max. • Low Power Dissipation Standby (CMOS): 550(iW (max.) L Version 110fiW (max.) U- Version Operating : 385mW(max.) • Single 5V±10% Power Supply

68 1103

Abstract: KM681000BL A14F
Contextual Info: CMOS SRAM KM681000BL / L-L 128Kx8 Bit High Speed CMOS Static RAM FEATURES GENERAL DESCRIPTION The KM 681000BUBL-L is a 1,048,576-bit high-speed Static Random Access Memory organized as131,072 words by 8 bits. The device is fabricated using Samsung's advanced

Contextual Info: KM681000AL/KM681000AL-L CMOS SRAM 128KX8 Bit Static RAM FEATURES GENERAL DESCRIPTION • Fast Access T im * 70,85,100,120 ns max. • Low Power Dissipation Standby (CMOS): 10pW (typ.) L-Version 5|iW (typ.) LL-Version Operating : 35mW (typ.) • Single S V ±10 % Power Supply

K6T1008C2E-GB70

Abstract: K6T1008C2E-TB55
Contextual Info: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin for industrial product.

KM681000ELG-5L

Abstract: KM681000E KM681000EL KM681000ELI KM681000ELI-L KM681000EL-L 32-DIP-600 128Kx8 cmos sram 600mil km681000elg-7
Contextual Info: KM681000E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin for industrial product.

K6T1008C2E-GB70

Abstract: K6T1008C2E-DL70 K6T1008C2E-TB55 k6t1008c2e 0855 K6T1008C2E-DB55 K6T1008C2E-DB70 K6T1008C2E-P K6T1008C2E-F k6t1008c2 K6T1008C2EGB70
Contextual Info: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin from industrial product.

K6T1008C2E

Abstract: K6T1008C2E-DL70 K6T1008C2E-B K6T1008C2E-F K6T1008C2E-L K6T1008C2E-P k6t1008c2e-gb55 K6T1008C2E-GB70
Contextual Info: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin from industrial product.

Contextual Info: Preliminary CMOS SRAM K6X1008C2D Family Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. 0.0 History Draft Data Remark Initial draft July 15, 2002 Preliminary The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and

k6x1008T2D

Contextual Info: Preliminary CMOS SRAM K6X1008T2D Family Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. 0.0 History Draft Data Remark Initial draft July 15, 2002 Preliminary The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and

K6T1008C2E-DB70

Contextual Info: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin for industrial product.

K6T1008C2E-GB70

Abstract: K6T1008C2E-DL70 K6T1008C2E K6T1008C2E-DB55 K6T1008C2E-B K6T1008C2E-F K6T1008C2E-L K6T1008C2E-P K6T1008C2ETB70 K6T1008C2E-DB70
Contextual Info: K6T1008C2E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. History Draft Data Remark 0.0 Design target October 12, 1998 Preliminary 1.0 Finalize - Improve tWP form 55ns to 50ns for 70ns product. - Remove 55ns speed bin from industrial product.

sram 681000

Abstract: KM681000ELG-5L KM681000
Contextual Info: Preliminary KM681000E Family CMOS SRAM Document Title 128Kx8 bit Low Power CMOS Static RAM Revision History Revision No. 0.0 H istory Draft Data Remark Design target October 12, 1998 Prelim inary The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and

p 602

Contextual Info: WPS128K8-XXX 128Kx8 SRAM PRELIMINARY * PLASTIC PLUS FEATURES • 5 Volt Power Supply ■ Low Power CMOS, 35mW typ. ■ Battery Back-Up Operation ■ Access Times 55, 70, 85nS ■ Standard Commercial Off-The-Shelf COTS Memory Devices for Extended Temperature Range