119PIN Search Results

MS-026

Abstract: MT55L256L32P MT55L256L36P MT55L256V32P MT55L256V36P MT55L512L18P MT55L512V18P
Contextual Info: 8Mb: 512K x 18, 256K x 32/36 PIPELINED ZBT SRAM 8Mb ZBT SRAM MT55L512L18P, MT55L512V18P, MT55L256L32P, MT55L256V32P, MT55L256L36P, MT55L256V36P 3.3V VDD, 3.3V or 2.5V I/O FEATURES • • • • • • • • • • • • • • • • • • •

MT55L256L18P1T-10A

Abstract: MS-026 MT55L128L32P1 MT55L128L36P1 MT55L128V32P1 MT55L128V36P1 MT55L256L18P1 MT55L256L18P1T-10 MT55L256V18P1 84 FBGA thermal
Contextual Info: PRELIMINARY 4Mb: 256K x 18, 128K x 32/36 PIPELINED ZBT SRAM 4Mb ZBT SRAM MT55L256L18P1, MT55L256V18P1, MT55L128L32P1, MT55L128V32P1, MT55L128L36P1, MT55L128V36P1 3.3V VDD, 3.3V or 2.5V I/O FEATURES • • • • • • • • • • • • • •

as15 G

Abstract: AS15 U as15 h TB001 0AP15 IS82C600 TMS320LC54X 6AP15 AS10
Contextual Info: ISSI ISSI IS82C600 IS82C600 TRAILBLAZER High-Speed SRAM with Address Decoding and Ready Logic ® PRELIMINARY JANUARY 1999 FEATURES • Zero wait-state performance on the Primary Bus — Point-to-point interface between the SRAM and the high-speed processor

t10-25 u2

Abstract: G2156 f10107
Contextual Info: Preliminary GS816273AC-300/275/250/225/200 300 MHz–200 MHz 256K x 72 1.8 V or 2.5 V VDD 18Mb S/DCD Sync Burst SRAMs 1.8 V or 2.5 V I/O 209-Pin BGA Commercial Temp Industrial Temp Features • Single/Dual Cycle Deselect selectable • IEEE 1149.1 JTAG-compatible Boundary Scan

Contextual Info: m IS61SF12832 128K x 32 SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 11 ns Internal self-timed write cycle Individual Byte Write Control and Global Write Clock controlled, registered address, data inputs and control signals

Contextual Info: IS82C600 TRAILBLAZER ISSI ADVANCE INFORMATION APRIL 1998 Virtual Dual-Port SRAM FEATURES • Virtual Dual-Port VDP SRAM • Seamless interface to Texas Instrum ents’ TMS320LC5x and TMS320LC54x high-speed DSPs • Zero wait-state performance up to 133 MHz on

Contextual Info: ISSI IS61SP25616 256K x 16 SYNCHRONOUS PIPELINED STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Pentium or linear burst sequence control

IS61LPS102418A

Abstract: IS61LPS25672A IS61LPS51236A IS61VPS102418A IS61VPS25672A IS61VPS51236A IS61LPS51236A-200TQLI 1024Kx18
Contextual Info: IS61VPS25672A IS61LPS25672A IS61VPS51236A IS61LPS51236A IS61VPS102418A IS61LPS102418A ISSI 256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

GS88218

Abstract: GS88236
Contextual Info: Preliminary GS88218/36B-11/11.5/100/80/66 119-Bump BGA Commercial Temp Industrial Temp MHz 512K x 18, 256K x 36 ByteSafe 100 MHz–66 3.3 V VDD 8Mb S/DCD Sync Burst SRAMs 3.3 V and 2.5 V I/O Features on every cycle with no degradation of chip performance.

K9F2G08U0C

Abstract: G388 180I 88436B
Contextual Info: Preliminary GS88418/36B-200/180/166/150/133 512K x 18, 256K x 36 8Mb S/DCD Sync Burst SRAMs 119-Bump BGA Commercial Temp Industrial Temp Features LBO input. The Burst function need not be used. New addresses can be loaded on every cycle with no degradation of

Contextual Info: SRAM ADDENDUM Attention: Micron has discontinued its 119-pin BGA SRAM package. While we are currently working to update these data sheets, please note that this data sheet still shows the discontinued package. For further information please call 208-368-3900.

Contextual Info: 8Mb: 512K x 18, 256K x 32/36 FLOW-THROUGH SYNCBURST SRAM 8Mb SYNCBURST SRAM MT58L512L18F, MT58L256L32F, MT58L256L36F; MT58L512V18F, MT58L256V32F, MT58L256V36F 3.3V VDD, 3.3V or 2.5V I/O, Flow-Through FEATURES • Fast clock and OE# access times • Single +3.3V +0.3V/-0.165V power supply VDD

W48C60

Abstract: J0801 w48c60-422 J0901 MC100LVEL39 MC12430 SME5410MCZ-270 587-pin TMS 3450 TMS 3450 specifications
Contextual Info: SME5410MCZ-270 July 1998 UltraSPARC -IIi CPU Module DATA SHEET 270 MHz CPU, 256 Kbyte E-cache, UPA, 66 MHz PCI DESCRIPTION The UltraSPARC™-IIi CPU module SME5410MCZ-270 is a high performance, SPARC V9-compliant, small form-factor CPU module. It interfaces to the UltraSPARC Port Architecture 64S (UPA64S) interconnect bus,

GS840E18A

Abstract: GS840E32A GS840E36A
Contextual Info: Preliminary GS840E18/32/36AT/B-190/180/166/150/100 TQFP, BGA Commercial Temp Industrial Temp 256K x 18, 128K x 32, 128K x 36 4Mb Sync Burst SRAMs Features • FT pin for user-configurable flow through or pipelined operation • Dual Cycle Deselect DCD operation

IS61LPS25632A

Abstract: IS61LPS25636A IS61LPS51218A IS61VPS25636A IS61VPS51218A
Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

zbt sram 1994

Contextual Info: SRAM ADDENDUM Attention: Micron has discontinued its 119-pin BGA SRAM package. While we are currently working to update these data sheets, please note that this data sheet still shows the discontinued package. For further information please call 208-368-3900.

IS64LF12832A-7

Abstract: is64lf12832a LF12836A E0108 IS61LF12836A-6.5B3
Contextual Info: IS61 64 LF12832A IS64VF12832A IS61(64)LF12836A IS61(64)VF12836A IS61(64)LF25618A IS61(64)VF25618A 128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: IS61NLF12836A/IS61NVF12836A IS61NLF25618A/IS61NVF25618A 128K x 36 and 256K x 18 4Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM MAY 2007 FEATURES DESCRIPTION • 100 percent bus utilization The 4 Meg 'NLF/NVF' product family feature high-speed, low-power synchronous static RAMs designed to provide

Contextual Info: IS61LPS51218A, IS61LPS25636A, IS61LPS25632A, IS64LPS25636A, IS61VPS51218A, IS61VPS25636A 256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write

Contextual Info: 8Mb: 512K x 18, 256K x 32/36 FLOW-THROUGH SYNCBURST SRAM 8Mb SYNCBURST SRAM MT58L512L18F, MT58L256L32F, MT58L256L36F; MT58L512V18F, MT58L256V32F, MT58L256V36F 3.3V VDD, 3.3V or 2.5V I/O, Flow-Through FEATURES • Fast clock and OE# access times • Single +3.3V +0.3V/-0.165V power supply VDD

4c 8184

Abstract: BGA 2J marking code 18-SE
Contextual Info: ADVANCE‡ 18Mb: 1 MEG x 18, 512K x 32/36 FLOW-THROUGH ZBT SRAM 18Mb ZBT SRAM MT55L1MY18F, MT55V1MV18F, MT55L512Y32F, MT55V512V32F, MT55L512Y36F, MT55V512V36F 3.3V VDD, 3.3V or 2.5V I/O; 2.5V VDD 2.5V I/O FEATURES • • • • • • • • • •

Contextual Info: NOT RECOMMENDED FOR NEW DESIGNS 18Mb: 1 MEG x 18, 512K x 32/36 PIPELINED, SCD SYNCBURST SRAM 18Mb SYNCBURST SRAM MT58L1MY18P, MT58V1MV18P, MT58L512Y32P, MT58V512V32P, MT58L512Y36P, MT58V512V36P 3.3V VDD, 3.3V or 2.5V I/O; 2.5V VDD, 2.5V I/O, Pipelined, Single-Cycle Deselect

Contextual Info: 8Mb: 512K x 18, 256K x 32/36 FLOW-THROUGH SYNCBURST SRAM 8Mb SYNCBURST SRAM MT58L512L18F, MT58L256L32F, MT58L256L36F; MT58L512V18F, MT58L256V32F, MT58L256V36F 3.3V VDD, 3.3V or 2.5V I/O, Flow-Through FEATURES • Fast clock and OE# access times • Single +3.3V +0.3V/-0.165V power supply VDD

MT58L128L32

Contextual Info: 4Mb: 256K x 18, 128K x 32/36 PIPELINED, SCD SYNCBURST SRAM 4Mb SYNCBURST SRAM MT58L256L18P1, MT58L128L32P1, MT58L128L36P1; MT58L256V18P1, MT58L128V32P1, MT58L128V36P1 3.3V VDD, 3.3V or 2.5V I/O, Pipelined, Single-Cycle Deselect FEATURES 100-PIN TQFP1 • Fast clock and OE# access times