1024LL Search Results

Contextual Info: IS62LV1024L 1024LL — 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM a d v a n c e in f o r m a t io n FEBRUARY 1997 FEATURES DESCRIPTION • Access times of 35, 45, 55, and 70 ns T he I S S I IS 62LV 1024L and IS62LV 1024LL are low pow er and low Vcc, 1 31,072-word by 8-bit C M O S static RAM s. T hey

Contextual Info: Preliminary information •■ 1024LL A 2.5V 128K X 8 lntelliwatt,v low power CM O S SRAM Features • • • • Intelliwatt active power reduction circuitry 2.3V to 3.0V operating range Organization: 131,072 words x 8 bits High speed - 5 5 * /7 0 /1 0 0 ns address access time

IC ATA 2398

Contextual Info: Advance information •■ A 1024LL 3.3V 128K ■8 Intelliwatt " low powei CAAOS SRAM Features • • • • Intelliw att active pow er reduction circuitry 2.7 V to 3.6V operating range O rganization: 131,072 w ords X 8 bits H igh speed - 3 5 / 5 5 / 7 0 / 1 0 0 ns address access tim e

Contextual Info: Preliminary information •■ 1024LL A 1,8V 128K x8 Intelliwatt,v low power CMOS SRAM Features • • • • Intelliwatt active power reduction circuitry 1.65V to 1.95V operating range JESD 8-7 Organization: 131,072 w ords x 8 bits High speed

chn 45L

Contextual Info: IS62LV1024L 1024LL ISSI 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM PRELIMINARY SEPTEMBER 1998 FEATURES DESCRIPTION • A c c e s s tim e s o f 3 5 , 4 5 , 5 0 , a n d 7 0 ns • L o w a c tiv e p o w e r: 6 0 m W ty p ic a l • L o w s ta n d b y p o w e r: 15 fiW (ty p ic a l) C M O S

Contextual Info: H ig h P e r fo r m a n c e 128K x8 CMOS SRAM « f l A S7C 1024L 1024LL Low power 1 28K X 8 CMOS SRAM C om m on I / O Advance information • Organization: 131,072 words x 8 bits • Single SV pow er supply • High speed - 5 5 /7 0 ns address access time

Contextual Info: H ig h P e r fo r m a n te 128KX8 C M O S SRAM A 1024LL mm II A 1 2 8 K X 8 In te lliw a tt lo w pow er CM O S SRAM Advance information Features > Easy m e m o ry e x p a n s io n w ith CE1, CE2, OE in p u ts • 2.7V to 3.6V o p e ra tin g ra n g e

AS7C31024LL-55BC

Abstract: AS7C31024LL-55TC AS7C31024LL-55TI
Contextual Info: 3UHOLPLQDU\#LQIRUPDWLRQ $6:&64357// 6169#45;.ð;#,QWHOOLZDWWŒ#ORZ#SRZHU#&026#65$0 HDWXUHV • Easy memory expansion with CE1, CE2, OE inputs • TTL/LVTTL-compatible, three-state I/O • JEDEC registered packaging - 32-pin TSOP packag - 48-ball 8mm x 6mm CSP BGA

C31024

Contextual Info: Preliminary information •■ 1024LL A 3.3V 12 8 K X 8 Intelliwatt low power CM OS SRAM Features • • • • Intelliwatt active power reduction circuitry 2.7V to 3.6Yoperating range Organization: 131,072 words x 8 bits High speed - 55/ 7 0 /1 0 0 ns address access time

Contextual Info: Advance information •■ 1024LL 1,8V 128K ■8 Intelliwatt " low powei CAAOS SRAM Features • Intelliw att active pow er reduction circuitry • 1.65V to 1.95V operating range JESD 8-7 • O rganization: 131,072 w ords X 8 bits • H igh speed - 3 5 / 5 5 /7 0 / 1 0 0 ns address access tim e

Contextual Info: 3UHOLPLQDU\LQIRUPDWLRQ $6&// 9.ð,QWHOOLZDWWŒORZSRZHU&02665$0 HDWXUHV • Easy memory expansion with CE1, CE2, OE inputs • TTL/LVTTL-compatible, three-state I/O • JEDEC registered packaging - 32-pin TSOP package - 48-ball 8mm x 6mm CSP BGA

Contextual Info: 3UHOLPLQDU\LQIRUPDWLRQ $6&// 9.ð,QWHOOLZDWWŒORZSRZHU&02665$0 HDWXUHV • Easy memory expansion with CE1, CE2, OE inputs • JEDEC registered packaging - 32-pin TSOP package - 48-ball 8mm x 6mm CSP BGA • ESD protection ≥ 2000 volts

IS62LV1024L

Abstract: IS62LV1024LL TSOP 1378
Contextual Info: IS62LV1024L 1024LL 128K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM PRELIMINARY SEPTEMBER 1998 DESCRIPTION FEATURES • A c c e s s tim e s o f 3 5 , 4 5 , 5 0 , a n d 7 0 ns • L o w a c tiv e p o w e r: 6 0 m W ty p ic a l • L o w s ta n d b y p o w e r: 15

AS7C31024LL-5STI

Contextual Info: H ig h P e r fo r m a n c e 128K X 8 C M O S SR AM - I I A S7C 31024L L Æ 1 2 8 K X 8 In teH iw att lo w pow er CM OS SRAM Advance information Features • E a sy m e m o r y e x p a n s i o n w i t h C E 1 , C E 2 , O E in p u t s • 2 .7 V t o 3 .6 V o p e r a t i n g r a n g e