100-10L AD Search Results
100-10L AD Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: Surface Mount ADEX-10L+ ADEX-10L Frequency Mixer Level 4 LO Power +4 dBm 10 to 1000 MHz Maximum Ratings Operating Temperature Storage Temperature Features • • • • • • • -40°C to 85°C -55°C to 100°C RF Power 50mW IF Current 40mA Pin Connections |
Original |
ADEX-10L+ ADEX-10L CD542 2002/95/EC) ADEX-10L | |
ADEX-10L
Abstract: DC-800
|
Original |
ADEX-10L+ ADEX-10L 2002/95/EC) CD542 ADEX-10L DC-800 | |
|
Contextual Info: Surface Mount ADEX-10L+ ADEX-10L Frequency Mixer Level 4 LO Power +4 dBm 10 to 1000 MHz Maximum Ratings Operating Temperature Features -40°C to 85°C Storage Temperature -55°C to 100°C RF Power 50mW IF Current 40mA Permanent damage may occur if any of these limits are exceeded. |
Original |
ADEX-10L+ ADEX-10L CD542 | |
ADEX-10L
Abstract: DC-800
|
Original |
ADEX-10L+ ADEX-10L 2002/95/EC) CD542 ADEX-10L DC-800 | |
|
Contextual Info: HM62W9128 Series 131072-Word x Preliminary 9-Bit High Speed CMOS Static RAM Ordering Information Description Type No. Access time HM62W9128LFP-10 100 ns HM62W9128LFP-12 120 ns HM62W9128LFP-10L 100 ns HM62W9128LFP-12L 120 ns HM62W9128LFP-10SL 100 ns HM62W9128LFP-12SL |
OCR Scan |
HM62W9128 131072-Word | |
5252 f 1201
Abstract: 232-600
|
Original |
ZX05-10L 200mW 5252 f 1201 232-600 | |
|
Contextual Info: MITSUBISHI LS Is SRAM MODULE STATIC RAM 1 M X 18 18M B IT Max. Type name Access Load memory time Outward dimensions Data sheet W x H x D (mm) page (ns) MH1M18AN-85L 85 MH1M18AN-10L 100 MH1M18AN-12L 120 MH1M18AN-15L 150 MH1M18AN-85H 85 MH1M18AN-10H 100 MH1M18AN-12H |
OCR Scan |
MH1M18AN-85L MH1M18AN-10L MH1M18AN-12L MH1M18AN-15L MH1M18AN-85H MH1M18AN-10H MH1M18AN-12H MH1M18AN-15H MH1M18ANZ-85L MH1M18ANZ-10L | |
|
Contextual Info: IW' VFTELIC V53C106A FAMILY HIGH PERFORMANCE, LOW POWER 256K x 4 BIT, STA TIC COLUMN MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C106A ADVANCED 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns |
OCR Scan |
V53C106A V53C106A 70/70L 80/80L 10/10L V53C106AL V53C106A-10 20-Pin 26/20-Pin | |
ADEX-10L
Abstract: DC-800
|
Original |
ADEX-10L CD542 M78421 ED-9623/2 ADEX-10L DC-800 | |
|
Contextual Info: iw VITELIC V53C105A FAMILY HIGH PERFORMANCE, LOW POWER 256K x 4 BIT, FA ST PAGE MODE, WRITE-PER-BIT CMOS DYNAMIC RAM ‘ HIGH PERFORMANCE V53C105A ADVANCED 70/70L 80/80L 10/10L 70 ns 80 ns 100 ns Max. RAS Access Time, tRAC Max. Column Address Access Time, (tCAA) |
OCR Scan |
V53C105A V53C105A 70/70L 80/80L 10/10L V53C105AL 26/20-Pin | |
|
Contextual Info: ISTf VITELIC V53C129A FAMILY HIGH PERFORMANCE, LOW POWER 128K X 8 B IT FAST PAGE MODE CMOS DYNAMIC RAM WITH WRITE-PER-BIT CAPABILITY HIGH PERFORMANCE V53C129A PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) |
OCR Scan |
V53C129A V53C129A 70/70L 80/80L 10/10L V53C129AL 2/I02 4/I04 2/I06 | |
|
Contextual Info: n r V53C464A FAMILY HIGH PERFORMANCE, LOW POWER 64KX4 BIT FAST PAGE MODE CMOS DYNAMIC RAM v ite lic HIGH PERFORMANCE V53C464A 60/60L 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns |
OCR Scan |
V53C464A 64KX4 V53C464A 60/60L 70/70L 80/80L 10/10L V53C464AL V53C464A-10 | |
k22s
Abstract: HP 1003 WA
|
OCR Scan |
V53C258A 256KX V53C25SA 60/60L 70/70L 80/80L 10/10L 115ns V53C258AL V53C258A-10 k22s HP 1003 WA | |
SBTC-2-10L
Abstract: ed99 AT1029 SBTC-2-10
|
Original |
SBTC-2-10L+ AT790 SBTC-2-10+ AT1029 SBTC-2-10L M102713 ED-9227 ED-9915D/2 SBTC-2-10L ed99 AT1029 SBTC-2-10 | |
|
|
|||
V54C128Contextual Info: gr VITELIC f V54C128 FAMILY HIGH PERFORMANCE, 128K x 8 BIT, PSEUDOSTA TIC, CMOS RAM ADVANCED 80/80L 10/10L 12/12L CE Access Time, tCEA 80 ns 100 ns 120 ns OE Access Time, (tQEA) 35 ns 40 ns 50 ns Min. Read-Write Cycle Time, (tRC) 130 ns 160 ns 190 ns HIGH PERFORMANCE V54C128 |
OCR Scan |
V54C128 80/80L V54C128 10/10L 12/12L 32-pin | |
|
Contextual Info: jS T f VITELIC V53C466A FAMILY HIGH PERFORMANCE, LOW POWER 64K X 4 BIT STATIC COLUMN CMOS DYNAMIC RAM 60/60L 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns 45 ns HIGH PERFORMANCE V53C466A |
OCR Scan |
V53C466A 60/60L 70/70L 80/80L 10/10L V53C466A V53C466AL | |
|
Contextual Info: M i i V VITELIC V53C400 HIGH PERFORMANCE, LOW POWER 4M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 50 ns Min. Fast Page Mode Cycle Time, (tpc) |
OCR Scan |
V53C400 70/70L V53C400 80/80L 10/10L V53C400L V53C400-10 V53C400L | |
|
Contextual Info: I‘f VITEUC V53C128A FAMILY HIGH PERFORMANCE, LOW POWER 128K X 8 BIT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C128A 70/70L 80/80L 10/10L 70 ns 60 ns 100 ns Max. RAS Access Time, tRAC Max. Column Address Access Time, (tCAA) 35 ns 40 ns 45 ns Min. Fast Page Mode Cycle Time, (tp c) |
OCR Scan |
V53C128A 70/70L 80/80L 10/10L V53C128A V53C128AL | |
|
Contextual Info: IW VITELIC V53C258A FAMILY HIGH PERFORMANCE, LOW POWER 2 5 6 K X 1 B IT STATIC COLUMN CMOS DYNAMIC RAM ‘ 60/60L HIGH PERFORMANCE V53C258A tRAC 70/70L 80/80L 10/10L 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 30 ns 35 ns 40 ns 45 ns |
OCR Scan |
V53C258A 60/60L V53C258A 70/70L 80/80L 10/10L V53C258AL | |
|
Contextual Info: ij‘ r VITELIC V53C102A FAMILY HIGH PERFORMANCE, LO W POWER 1M x 1 BIT, STATIC COLUMN MODE CMOS DYNAMIC RAM ADVANCED 70/70L 80/80L 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 45 ns Min. Static Column Mode Cycle Time, (tp c ) |
OCR Scan |
V53C102A 70/70L 80/80L 10/10L V53C102A V53C102AL V53C102A-10 18-Pin 26/20-Pin 53C102AK | |
gl 9608Contextual Info: ST 1 VITELIC V53C664 64K x 16 B IT FAST PAGE MODE BYTE WRITE CMOS DYNAMIC RAM * PRELIMINARY 80/80L 10/10L Max. RAS Access Time, tRAC 80 ns 100 ns Max. Column Address Access Time, (tCAA) 45 ns 55 ns Min. Fast Page Mode Cycle Time, (tp c ) 55 ns 65 ns Min. Read/Write Cycle Time, (tRC) |
OCR Scan |
V53C664 80/80L 10/10L V53C664L 16-bit gl 9608 | |
|
Contextual Info: VITELIC V 53C 258 FAMILY HIGH PERFORMANCE, LOW POWER 2 5 6 K X 1 B IT STA TIC COLUMN CMOS DYN AM IC RAM “ HIGH PERFORMANCE V53C258 70/70L 12/12L* 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns 120 ns Max. Column Address Access Time, tCAA 35 ns 40 ns |
OCR Scan |
V53C258 70/70L 12/12L* 10/10L V53C258L 0l4901^ | |
V53C400
Abstract: PIN CONFIGURATION 7411 TTL 7411 ms1953
|
OCR Scan |
V53C400 70/70L 80/80L 10/10L V53C400L V53C400-10 V53C400L-0 PIN CONFIGURATION 7411 TTL 7411 ms1953 | |
|
Contextual Info: Surface Mount Power Splitter/Combiners 2 Way-0° 50Ω Maximum Ratings Operating Temperature Storage Temperature Power Input as a splitter Internal Dissipation SBTC-2-10+ SBTC-2-10L+ 5 to 1000 MHz Features -40°C to 85°C -55°C to 100°C 0.5W max. 0.125W max. |
Original |
SBTC-2-10+ SBTC-2-10L+ AT790 AT1029 TB-274 PL-152) SBTC-2-10L ED-9227 | |